鈥?/div>
PI74ALVCH162244 is designed for low voltage operation
V
CC
= 2.3V to 3.6V
Hysteresis on all inputs
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25擄C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25擄C
Output ports have equivalent 26鈩?series resistors:
no external resistors are required
Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
Industrial operation at 聳40擄C to +85擄C
Packages available:
聳 48-pin 240 mil wide plastic TSSOP (A)
聳 48-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductor聮s PI74ALVCH series of logic circuits
are produced in the Company聮s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The PI74ALVCH162244 is an non-inverting 16-bit buffer/driver
designed for low voltage 2.3V to 3.6V V
CC
operation.
The buffer/driver is designed specifically to improve both the
performance and density of 3-STATE memory address drivers,
clock drivers, and bus-oriented receivers and transmitters.
The device can be used as four 4-bit buffers, two 8-bit buffers, or
one 16-bit buffer. It provides inverting outputs and symmetrical
active-low output-enable (OE) inputs.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor in
which the minimum value is determined by the current-sinking
capability of the driver.
The PI74ALVCH162244 has 聯(lián)Bus Hold聰 which retains the data
input聮s last state whenever the data input goes to high-imped-
ance preventing 聯(lián)floating聰 inputs and eliminating the need for
pullup/down resistors.
Logic Block Diagram
1
OE
3
OE
1
A
0
1
Y
0
3
A
0
3
Y
0
1
A
1
1
Y
1
3
A
1
3
Y
1
1
A
2
1
Y
2
3
A
2
3
Y
2
1
A
3
1
Y
3
3
A
3
3
Y
3
2
OE
4
OE
2
A
0
2
Y
0
4
A
0
4
Y
0
2
A
1
2
Y
1
4
A
1
4
Y
1
2
A
2
2
Y
2
4
A
2
4
Y
2
2
A
3
2
Y
3
4
A
3
4
Y
3
1
PS8092B
07/14/00
PERICOM
1
2
3
4
