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PI6CVF857ZDE Datasheet

  • PI6CVF857ZDE

  • 1:10 PLL Clock Driver for 2.5V DDR-SDRAM Memory

  • 14頁

  • PERICOM   PERICOM

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PI6CVF857
1:10 PLL Clock Driver for
2.5V DDR-SDRAM Memory
Product Features
鈥?Operating Frequency up to 220 MHz for PC3200 Registered
DIMM applications
鈥?Distributes one differential clock input pair to ten differential
clock output pairs
鈥?Inputs (CLK,CLK) and (FBIN,FBIN)
鈥?Input PWRDWN: LVCMOS
鈥?Outputs (Yx, Yx), (FBOUT, FBOUT)
鈥?External feedback pins (FBIN,FBIN) are used to
synchronize the outputs to the clock input
鈥?Operates at 2.5V for PC1600, PC2100, PC2700,
and 2.6V for PC3200
鈥?Packaging (Pb-free & Green available, select packages):
鈥?48-pin TSSOP
鈥?40-pin TQFN
鈥?56-ball VFBGA
Product Description
PI6CVF857 PLL clock device is developed for registered DDR DIMM
applications. The device is a zero-delay buffer that distributes a
differential clock input pair (CLK, CLK) to ten differential pairs of
clock outputs (Y[0:9], Y[0:9]), and one differential pair feedback clock
outputs (FBOUT,FBOUT) . The clock outputs are controlled by the
input clocks (CLK, CLK), the feedback clocks (FBIN,FBIN), the 2.5V
LVCMOS input (PWRDWN), and the Analog Power input (AV
DD
).
When input PWRDWN is low while power is applied, the input
receivers are disabled, the PLL is turned off, and the differential clock
outputs are 3-stated. When the AV
DD
is strapped low, the PLL is
turned off and bypassed for test purposes.
When the input frequency falls below a suggested detection fre-
quency that is below the operating frequency of the PLL, the device
will enter a low power mode. An input frequency detection circuit will
detect the low frequency condition and perform the same low power
features as when the PWRDWN input is low.
The PLL in the PI6CVF857 clock driver uses the input clocks (CLK,
CLK) and the feedback clocks (FBIN,FBIN) to provide high-perfor-
mance, low-skew, low-jitter output differential clocks (Y[0:9], Y[0:9]).
The PI6CVF857 is also able to track Spread Spectrum Clocking for
reduced EMI.
Block Diagram
Y0
Y0
Y1
Y1
Y2
Y2
Y3
Y3
Y4
Y4
Y5
Y5
Y6
Y6
Y7
Y7
Y8
Y8
Y9
Y9
FBOUT
FBOUT
CLK
CLK
FBIN
FBIN
PLL
PWRDWN
AVDD
Powerdown
and Test
Logic
1
PS8683B
10/17/03

PI6CVF857ZDE 產(chǎn)品屬性

  • 429

  • 集成電路 (IC)

  • 時(shí)鐘/計(jì)時(shí) - 專用

  • -

  • 時(shí)鐘緩沖器/驅(qū)動(dòng)器，多路復(fù)用器

  • 是

  • 存儲(chǔ)器，DDR，SDRAM DIMM

  • SSTL-2

  • SSTL-2

  • 1

  • 1:10

  • 是/是

  • 220MHz

  • 2.3 V ~ 2.7 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 40-VFQFN 裸露焊盤

  • 40-TQFN（6x6）

  • 管件

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