21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
1
2109876543212109876543210987654321098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C185-01B
Precision 1-5 Clock Buffer
Features
聲
High-speed, low-noise non-inverting 1-5 buffer
聲
Switching speed up to 140 MHz
聲
Supports up to two SODIMMs
聲
Low skew (<250ps) between any two output clocks
聲
I
2
C Serial Configuration interface
聲
Multiple V
DD
, V
SS
pins for noise reduction
聲
3.3V power supply voltage
聲
16-pin TSSOP (L) and QSOP (Q) packages
Description
The PI6C185-01B, a high-speed low-noise 1-5 non-inverting buffer
designed for SDRAM clock buffer applications, is intended to be
used with the PI6C10X clock generator for Intel Architecture-based
Mobile systems.
At power up, all SDRAM outputs are enabled and active. The I
2
C
Serial control may be used to individually activate/deactivate any
of the five output drivers.
Note:
Purchase of I
2
C components from Pericom conveys a license to
use them in an I
2
C system as defined by Philips.
Block Diagram
SDRAM0
Pin Configuration
SDRAM1
BUF_IN
SDRAM2
SDRAM3
Vdd
SDRAM0
SDRAM1
Vss
BUF_IN
Vdd
SDATA
SCLK
1
2
3
4
5
6
7
8
16-Pin
L, Q
16
15
14
13
12
11
10
9
Vdd
SDRAM4
Vss
Vdd
SDRAM3
SDRAM2
Vss
Vss
SDRAM4
SDATA
SCLOCK
I2C
I/O
1
PS8466
05/03/00
1
2
3
4
5
6
