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PI6C184

Precision 1-13 Clock Buffer

Product Features

鈥?/div>

High speed, low noise non-inverting 1-13 buffer

鈥?/div>

Supports up to four SDRAM DIMMs

鈥?/div>

Low skew (< 250ps) between any two output clocks

鈥?/div>

I

2

C Serial Configuration interface

鈥?/div>

Multiple V

DD

, V

SS

pins for noise reduction

鈥?/div>

3.3V power supply voltage

鈥?/div>

Separate Hi-Z pin for testing

鈥?/div>

28-pin SSOP and SOIC packages (H, S)

Description

The PI6C184 is a high-speed low-noise 1-13 non-inverting

buffer designed for SDRAM clock buffer applications.

This buffer is intended to be used with the PI6C104 clock generator

for Intel Architecture for both desktop and mobile systems.

At power up all SDRAM output are enabled and active. The I

2

C

Serial control may be used to individually activate/deactivate any

of the 13 output drivers.

Note:

Purchase of I

2

C components from Pericom conveys a license to

use them in an I

2

C system as defined by Philips.

Block Diagram

Pin Configuration

SDRAM0

V

DD

SDRAM1

BUF_IN

SDRAM2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

V

DD

S

DRAM

11

S

DRAM

10

V

SS

V

DD

S

DRAM

9

S

DRAM

8

V

SS

V

DD

S

DRAM

7

S

DRAM

6

V

SS

V

SS

S

CLK

S

DRAM

0

S

DRAM

1

V

SS

V

DD

S

DRAM

2

SDRAM3

S

DRAM

3

V

SS

BUF_IN

28-Pin

H, S

22

21

20

19

18

17

16

15

SDRAM12

S

DRAM

4

S

DRAM

5

S

DRAM

12

SDATA

SCLOCK

I2C

I/O

V

DD

S

DATA

1

PS8320A

02/05/01

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