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PI6C184-02H Datasheet

  • PI6C184-02H

  • THIRTEEN DISTRIBUTED-OUTPUT CLOCK DRIVER|CMOS|SSOP|28PIN|PLA...

  • 6頁

  • ETC

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PI6C184-02
Precision 1-13 Clock Buffer
Features
鈥?/div>
High speed, low noise non-inverting 1-13 buffer
鈥?/div>
Supports up to four SDRAM DIMMs
鈥?/div>
Low skew (<250ps) between any two output clocks
鈥?/div>
I
2
C Serial Configuration interface
鈥?/div>
Multiple V
DD
, V
SS
pins for noise reduction
鈥?/div>
3.3V power supply voltage
鈥?/div>
28-pin SSOP and SOIC packages (H, S)
Description
The PI6C184-02 is a high-speed low-noise 1-13 non-inverting
buffer designed for SDRAM clock buffer applications.
This buffer is intended to be used with the PI6C104 clock generator
for Intel Architecture for both desktop and mobile systems.
At power up all SDRAM output are enabled and active. The
I
2
C Serial control may be used to individually activate/deactivate
any of the 13 output drivers.
Note:
Purchase of I
2
C components from Pericom conveys a license to
use them in an I
2
C system as defined by Philips.
Block Diagram
SDRAM0
Pin Configuration
SDRAM1
BUF_IN
SDRAM2
SDRAM3
SDRAM12
SDATA
SCLOCK
I2C
I/O
V
DD
SDRAM0
SDRAM1
V
SS
V
DD
SDRAM2
SDRAM3
V
SS
BUF_IN
SDRAM4
SDRAM5
SDRAM12
V
DD
SDATA
1
2
3
4
5
6
28-Pin
H, S
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
DD
SDRAM11
SDRAM10
V
SS
V
DD
SDRAM9
SDRAM8
V
SS
V
DD
SDRAM7
SDRAM6
V
SS
V
SS
SCLK
1
PS8319
05/03/00

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