ADVANCE INFORMATION
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PI6C1202
Precision Clock Generator
for Laser Printers
Features
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Supports laser printer pixel rates up to 120 MHz.
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Jitter less than 200ps.
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Easily programmable frequency selections via parallel
interface. Post divider (R) designed to load only during
the Beam Detect interval.
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Source clock input can be from crystal or oscillator.
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Crystal frequency range from 8 MHz to 22 MHz.
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Oscillator frequency range from 8 MHz to 30 MHz.
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Active LOW asynchronous reset input for synchronization
with engine via Beam Detect Input.
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Synchronized Beam Detect Output to support external state
machines.
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Glitch-less clock output after Beam Detect.
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Supports dynamic frequency changes on a line-per-line basis.
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Mixed line resolution supports half-toning and gray scale
operations.
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Minimizes controller memory utilization (low-resolution text
mixed with high-resolution images).
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On-chip VCO loop filter (no external components).
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On-chip crystal oscillator (modified Pierce).
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Single 5V power supply.
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Low power consumption.
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Packaging:
20-pin wide body SOIC (S), 20-pin wide body TSSOP (L)
Description
The PI6C1202 is an advanced CMOS clock generator designed
specifically to support pixel clock generation in low-cost laser
printers. Capable of generating highly stable clock frequencies up
to 120 MHz, this device supports printer engines with dot resolu-
tions of 1,200 dpi and above. Page speeds may range from 4 pages
per minute to better than 60 pages per minute.
Mixed-line resolution supports half-toning and gray scale opera-
tions (low-resolution text mixed with high-resolution images) and
minimizes controller memory utilization.
Pinout Diagram
X1/ICLK
X2
SEL0
GND
SEL1
SEL2
VCC
AGND
OE
AVCC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
BDOWID
GND
PCLK
GND
BD#
BDOUT
BDOPOL
R0
R1
R2
20-Pin
L, S
16
15
14
13
12
11
Functional Block Diagram
Prescale
X1
X2
CLK
IN
.
. 2
Phase &
Freq Det
Charge
Pump
Loop
Filter
VCO
Multiplier
.
. N
0
1 2
SEL
BD#
OE
Control &
Resolution
Select
(R)
BDOUT
PCLK
R0 R1 R2
1
PXXXX
09/06/01
1
2
3
4
5
6
7
8
