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PI6C106-H Datasheet

  • PI6C106-H

  • CPU System Clock Generator

  • 8頁

  • ETC

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PI6C106
Pentium/Pro
TM
System Clock Chip
Features
鈥?/div>
Three CPUs @2.5V, up to 100 MHz
鈥?/div>
Seven PCIs @ 3.3V (including one free running, 1 early)
鈥?/div>
One 48 MHz @ 3.3V fixed
鈥?/div>
One REF (3.3V, 14.318 MHz)
鈥?/div>
One IOAPIC (2.5V, 14.318 MHz)
鈥?/div>
Strong REF clock (1V/ns @50pF load)
鈥?/div>
Excellent power management features including
Power Down, PCI, and CPU stops
鈥?/div>
Spread Spectrum for EMI control (0.5% down spread)
鈥?/div>
Early PCI (2.5ns 鹵700ps)
鈥?/div>
Enhanced PCICLK4 (1.5X)
鈥?/div>
28-pin SSOP Packaging (H)
Description
The PI6C106 is part of a reduced pin count two-chip clock solution
for designs using an Intel BX style chipset. Companion SDRAM
buffers are PI6C182 & PI6C184.
There are two PLLs, with the first PLL capable of spread spectum
operation. CPU frequencies up to 100 MHz are supported.
Frequency Table
SEL 100/66.6#
1
0
CPU M Hz
100
66.6
PCI M Hz
33.3
33.3
Block Diagram
Pin Configuration
GND1
X1
X2
OSC
REF0
VDDLA
IOAPIC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
REF0
VDD1
IOAPIC
VDDLA
CPUCLK0
CPUCLK1
CPUCLK2
VDDLC
GND
PCI_STOP#
CPU_STOP#
PD#
SPREAD#
GND3
X1
X2
GND2
PCICLK_E
CPU_STOP#
SPREAD#
VDDLC
PLL
Spread
Spectrum
CPU
STOP
CPUCLK(0:2)
PCICLK_F
PCICLK0
SEL 100/66.6#
梅2
PD#
梅3
PCICLK1
VDD2
PCICLK_E
28-Pin
H
22
21
20
19
18
17
16
15
BUS
STOP#
PCICLK2
PCICLK(0:4)
PCICLK3
PCICLK_F
PCI_STOP#
PLL2
48MHz
PCICLK4/
SEL100/66.6#
VDD3
48MHz
1
PS8546A
07/13/01

PI6C106-H相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
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    廠商
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  • 英文版
    Clock IC | 100 MHz Dual Pentium II Desktop Clock
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    PERICOM
  • 英文版
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  • 英文版
    Clock IC | 750ps Accuracy. 5V. TTL. 3.75 to 80 MHz
    ETC

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