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PI49FCT3807DQ Datasheet

  • PI49FCT3807DQ

  • Ten Distributed-Output Clock Driver

  • 448.26KB

  • 6頁(yè)

  • ETC

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PI49FCT3807D
1-10 Clock Buffer for Networking Applications
Description
Product Features
聲 High Frequency >156 MHz
聲 High-speed, low-noise, non-inverting 1-10 buffer
聲 Low-skew (<250ps) between any two output clocks
聲 Low duty cycle distortion <250ps
聲 Low propagation delay <2.5ns
聲 Multiple V
DD
, GND pins for noise reduction
聲 3.3V supply voltage
聲 Available in SOIC, SSOP, and QSOP packages
The PI49FCT3807D is a 3.3V compatible, high-speed, low-noise
1-10 non-inverting clock buffer. The key goal in designing the
PI6C3807D is to target networking applications that require low-
skew, low-jitter, and high-frequency clock distribution. Providing
output-to-output skew as low as 150ps, the PI49FCT3807D is an
ideal clock distribution device for synchronous systems. Design-
ing synchronous networking systems requires a tight level of skew
from a large number of outputs.
Block Diagram
Pin Configuration
CLK0
BUF_IN
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
VDD
CLK9
CLK8
GND
CLK7
VDD
CLK6
GND
CLK5
CLK4
CLK1
BUF_IN
CLK2
CLK0
VDD
CLK1
GND
20-Pin
H,Q,S
17
16
15
14
13
12
11
CLK3
CLK2
VDD
CLK3
CLK9
GND
1
PS8493
08/09/00

PI49FCT3807DQ 產(chǎn)品屬性

  • 55

  • 集成電路 (IC)

  • 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器

  • 49FCT

  • 扇出緩沖器（分配）

  • 1

  • 1:10

  • 無(wú)/無(wú)

  • CMOS，TTL

  • CMOS，TTL

  • 156MHz

  • 3 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 20-SSOP（0.154"，3.90mm 寬）

  • 20-QSOP

  • 管件

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