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PI49FCT3802/PI49FCT3803
1:5/1:7 Clock Buffer
for Networking Applications
Product Features
聲 High Frequency >156 MHz
聲 High-speed, low-noise, non-inverting buffer
- PI49FCT3802 is 1:5 buffer
- PI49FCT3803 is 1:7 buffer
聲 Low-skew (<250ps) between any two output clocks
聲 Low duty cycle distortion <250ps
聲 Low propagation delay <2.5ns
聲 5V Tolerant input
聲 Multiple V
DD
, GND pins for noise reduction
聲 3.3V supply voltage
聲 Packages Available:
- TSSOP and QSOP
Description
The PI49FCT380x is a 3.3V compatible, high-speed, low-noise
non-inverting clock buffer. The key goal in designing the PI6C380x
is to target networking applications that require low-skew, low-
jitter, and high-frequency clock distribution. Providing
output-to-output skew as low as 250ps, the PI49FCT380x is an ideal
clock distribution device for synchronous systems. Designing
synchronous networking systems requires a tight level of skew
from a large number of outputs.
Product Pin Description
Pin Name
PI49FCT3802
BUF_IN
CLK [0:4]
GND
V
DD
PI49FCT3803
BUF_IN
CLK [0:6]
GND
V
DD
D e s cription
Input
O utputs
GND
Power
Pin Configuration (PI49FCT3802)
BUF_IN
GND
CLK0
VDD
CLK1
GND
NC
VDD
1
2
3
4
5
6
7
8
16
15
14
VDD
CLK4
CLK3
Block Diagram (PI49FCT3802)
CLK0
CLK1
BUF_IN
16-Pin
L, Q
13
12
11
10
9
GND
CLK2
CLK2
VDD
NC
GND
CLK3
CLK4
Pin Configuration (PI49FCT3803)
BUF_IN
GND
CLK0
VDD
CLK1
GND
CLK2
VDD
1
2
3
4
5
6
7
8
16
15
VDD
CLK6
Block Diagram (PI49FCT3803)
CLK0
CLK1
16-Pin
L, Q
14
13
12
11
10
9
CLK5
GND
CLK4
VDD
CLK3
GND
BUF_IN
CLK2
CLK3
CLK6
1
PS8559
08/09/01
1
2
3
4
5
