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PHU2N50E Datasheet

  • PHU2N50E

  • PowerMOS transistors Avalanche energy rated

  • 66.08KB

  • 9頁(yè)

  • PHILIPS

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Philips Semiconductors
Product specification
PowerMOS transistors
Avalanche energy rated
FEATURES
鈥?Repetitive Avalanche Rated
鈥?Fast switching
鈥?Stable off-state characteristics
鈥?High thermal cycling performance
鈥?Low thermal resistance
鈥?Extremely high dV/dt capability
PHU2N50E
QUICK REFERENCE DATA
V
DSS
= 500 V
I
D
= 2 A
R
DS(ON)
鈮?/div>
5
鈩?/div>
GENERAL DESCRIPTION
N-channel, enhancement mode field-effect power transistor, intended for use in
Compact Fluorescent Lamps
(CFL)
and low power ballasts. The PHU2N50E is compatible with self oscillating and IC driven circuits, including the UBA2021
ballast controller IC. Other applications include off line switched mode power supplies and D.C. to D.C. converters.
The PHU2N50E is supplied in the SOT533 (I-PAK) leaded package.
PINNING
PIN
DESCRIPTION
------------- ---------------------------------
1
gate
2
3
tab
drain
source
drain
SYMBOL
d
SOT533
g
1
2
3
MBK915
s
Top view
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
V
DSS
V
DGR
V
GS
I
D
I
DM
P
D
dV/dt
T
j
, T
stg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total dissipation
Peak Diode Recovery
voltage slope. (See fig. 19)
Operating junction and
storage temperature range
CONDITIONS
T
j
= 25 藲C to 150藲C
T
j
= 25 藲C to 150藲C; R
GS
= 20 k鈩?/div>
T
mb
= 25 藲C; V
GS
= 10 V
T
mb
= 100 藲C; V
GS
= 10 V
T
mb
= 25 藲C
T
mb
= 25 藲C
I
ds
2.0 A; dI/dt = 100 A/碌s;
V
s
= 8V; T
j
< T
jmax
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
500
500
鹵
30
2
1.3
8
50
5.2
150
UNIT
V
V
V
A
A
A
W
V/ns
藲C
May 1999
1
Rev 1.000

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    PowerMOS transistors Avalanche energy rated
    PHILIPS
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