Philips Semiconductors
Objective Specification
PowerMOS transistor
PHP1N60E
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect power transistor in a
plastic envelope featuring high
avalanche energy capability, stable
blocking voltage, fast switching and
high thermal cycling performance
with low thermal resistance. Intended
for use in Switched Mode Power
Supplies (SMPS), motor control
circuits and general purpose
switching applications.
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
R
DS(ON)
PARAMETER
Drain-source voltage
Drain current (DC)
Total power dissipation
Drain-source on-state resistance
MAX.
600
1.9
50
6
UNIT
V
A
W
鈩?/div>
PINNING - TO220AB
PIN
1
2
3
tab
gate
drain
source
drain
DESCRIPTION
PIN CONFIGURATION
tab
SYMBOL
d
g
1 23
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
V
DS
V
DGR
鹵V
GS
I
D
I
DM
I
DR
I
DRM
P
tot
T
stg
T
j
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (pulse peak
value)
Source-drain diode current
(DC)
Source-drain diode current
(pulse peak value)
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
R
GS
= 20 k鈩?/div>
T
mb
= 25 藲C
T
mb
= 100 藲C
T
mb
= 25 藲C
T
mb
= 25 藲C
T
mb
= 25 藲C
T
mb
= 25 藲C
MIN.
-
-
-
-
-
-
-
-
-
-55
-
MAX.
600
600
30
1.9
1.2
7.6
1.9
7.6
50
150
150
UNIT
V
V
V
A
A
A
A
A
W
藲C
藲C
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER
W
DSS
CONDITIONS
MIN.
MAX.
UNIT
Drain-source non-repetitive I
D
= 1.9 A; V
DD
鈮?/div>
50 V; V
GS
= 10 V;
unclamped inductive turn-off R
GS
= 50
鈩?/div>
energy
T
j
= 25藲C prior to surge
T
j
= 100藲C prior to surge
Drain-source repetitive
I
D
= 1.9 A; V
DD
鈮?/div>
50 V; V
GS
= 10 V;
unclamped inductive turn-off R
GS
= 50
鈩?
T
j
鈮?/div>
150 藲C
energy
W
DSR1
-
-
-
120
20
3.6
mJ
mJ
mJ
1. Pulse width and frequency limited by T
j(max)
October 1996
1
Rev 1.000
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