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PHN1011 Datasheet

  • PHN1011

  • TrenchMOS transistor Logic level FET

  • 7頁(yè)

  • PHILIPS

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Philips Semiconductors
Product specification
TrenchMOS鈩?transistor
Logic level FET
FEATURES
鈥?鈥橳rench鈥?technology
鈥?Low on-state resistance
鈥?Fast switching
鈥?High thermal cycling performance
鈥?Low-profile surface mount
package
鈥?Logic level compatible
PHN1011
SYMBOL
d
QUICK REFERENCE DATA
V
DSS
= 25 V
I
D
= 11 A
g
R
DS(ON)
鈮?/div>
11 m鈩?(V
GS
= 10 V)
R
DS(ON)
鈮?/div>
13.5 m鈩?(V
GS
= 5 V)
s
GENERAL DESCRIPTION
N-channel enhancement mode
logic level field-effect power
transistor in a surface mounting
plastic package using 鈥檛rench鈥?/div>
technology. The combination of
very low on-state resistance and
low switching losses make this
device the optimum choice in high
speed computer motherboard d.c.
to d.c. converters.
The PHN1011 is supplied in the
SOT96-1 (SO8) surface mounting
package
PINNING
PIN
1-3
4
5-8
DESCRIPTION
SOT96-1 (SO8)
8
7
6
5
source
gate
drain
pin 1 index
1
2
3
4
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DSS
V
DGR
V
GS
V
GSM
I
D
I
DM
P
tot
T
j
, T
stg
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage (DC)
Gate-source voltage (pulse peak
value)
Drain current (t
p
鈮?/div>
10 s)
Drain current (pulse peak value)
Total power dissipation
Operating junction and storage
temperature
CONDITIONS
T
j
= 25 藲C to 150藲C
T
j
= 25 藲C to 150藲C;
R
GS
= 20 k鈩?/div>
-
T
a
= 25 藲C
T
a
= 70 藲C
T
a
= 25 藲C
T
a
= 25 藲C
T
a
= 70 藲C
-
MIN.
-
-
-
-
-
-
-
-
-
- 55
MAX.
25
25
鹵
15
鹵
20
11
9
44
2.5
1.6
150
UNIT
V
V
V
V
A
A
A
W
W
藲C
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-a
R
th j-a
Thermal resistance junction
to ambient
Thermal resistance junction
to ambient
CONDITIONS
Surface mounted, FR4 board, t
鈮?/div>
10 sec
Surface mounted, FR4 board
TYP.
-
150
MAX.
50
-
UNIT
K/W
K/W
June 1999
1
Rev 1.100

PHN1011相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    N-channel enhancement mode MOS transistor
    PHILIPS
  • 英文版
    N-channel enhancement mode MOS transistor
    PHILIPS [P...
  • 英文版
    N-channel enhancement mode MOS transistor
    PHILIPS
  • 英文版
    N-channel enhancement mode MOS transistor
    PHILIPS [P...
  • 英文版
    TrenchMOS transistor Logic level FET
    PHILIPS
  • 英文版
    TrenchMOS transistor Logic level FET
    PHILIPS [P...
  • 英文版
    N-channel enhancement mode MOS transistor
    PHILIPS
  • 英文版
    N-channel enhancement mode MOS transistor
    PHILIPS [P...
  • 英文版
    N-channel TrenchMOS transistor Logic level
    PHILIPS
  • 英文版
    N-channel TrenchMOS transistor Logic level
    PHILIPS [P...
  • 英文版
    N-channel TrenchMOS transistor Logic level FET
    PHILIPS
  • 英文版
    N-channel TrenchMOS transistor Logic level FET
    PHILIPS [P...
  • 英文版
    TRANSISTOR | MOSFET | N-CHANNEL | 25V V(BR)DSS | 6A I(D) | S...
    ETC
  • 英文版
    TRANSISTOR | MOSFET | N-CHANNEL | 25V V(BR)DSS | 6A I(D) | S...
  • 英文版
    TRANSISTOR | MOSFET | N-CHANNEL | 30V V(BR)DSS | 8.6A I(D) |...
    ETC
  • 英文版
    N-channel enhancement mode field-effect transistor
    Philips
  • 英文版
    TRANSISTOR | MOSFET | N-CHANNEL | 30V V(BR)DSS | SO
    ETC
  • 英文版
    TRANSISTOR | MOSFET | N-CHANNEL | 30V V(BR)DSS | SO
  • 英文版
    TRANSISTOR | MOSFET | N-CHANNEL | 30V V(BR)DSS | 4A I(D) | S...
    ETC
  • 英文版
    TRANSISTOR | MOSFET | N-CHANNEL | 30V V(BR)DSS | 4A I(D) | S...

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