PHM21NQ15T
TrenchMOS鈩?standard level FET
Rev. 02 鈥?11 September 2003
M3D879
Product data
1. Product pro鏗乴e
1.1 Description
N-channel enhancement mode 鏗乪ld-effect transistor in a plastic package using
TrenchMOS鈩?technology.
1.2 Features
s
SOT96 (SO8) footprint compatible
s
Surface mounted package
s
Low thermal resistance
s
Low pro鏗乴e.
1.3 Applications
s
DC-to-DC primary side
s
Portable equipment applications.
1.4 Quick reference data
s
V
DS
鈮?/div>
150 V
s
P
tot
鈮?/div>
62.5 W
s
I
D
鈮?/div>
22.2 A
s
R
DSon
鈮?/div>
55 m鈩?/div>
2. Pinning information
Table 1:
Pin
1,2,3
4
5,6,7,8
mb
Pinning - SOT685-1 (QLPAK), simpli鏗乪d outline and symbol
Description
source (s)
gate (g)
drain (d)
mounting base
connected to drain
mb
g
s
Simpli鏗乪d outline
[1]
Symbol
1
4
d
MBB076
8
Bottom view
5
MBL585
SOT685-1(QLPAK)
[1]
Shaded area indicates pin 1 identi鏗乪r.
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英文版
TrenchMOS standard level FET
PHILIPS
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英文版
TrenchMOS standard level FET
PHILIPS [P...
-
英文版
TrenchMOS standard level FET
PHILIPS
-
英文版
TrenchMOS standard level FET
PHILIPS [P...