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PHKD3NQ10T Datasheet

  • PHKD3NQ10T

  • Dual N-channel TrenchMOS transistor

  • 7頁

  • PHILIPS

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Philips Semiconductors
Product specification
Dual N-channel TrenchMOS
TM
transistor
PHKD3NQ10T
FEATURES
鈥?Dual device
鈥?Low on-state resistance
鈥?Fast switching
鈥?Low profile surface mount
package
SYMBOL
d1
d2
QUICK REFERENCE DATA
V
DS
= 100 V
I
D
= 3 A
R
DS(ON)
鈮?/div>
90 m鈩?(V
GS
= 10 V)
s2
g1
s1
g2
GENERAL DESCRIPTION
Dual N-channel enhancement
mode field-effect transistor in a
plastic envelope using 鈥檛rench鈥?/div>
technology.
Applications:-
鈥?Motor and relay drivers
鈥?d.c. to d.c. converters
The PHKD3NQ10T is supplied in
the SOT96-1 (SO8) surface
mounting package.
PINNING
PIN
1
2
3
4
5,6
7,8
DESCRIPTION
source 1
gate 1
source 2
gate 2
drain 2
drain 1
SOT96-1
8
7
6
5
pin 1 index
1
2
3
4
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
tot
T
stg
, T
j
PARAMETER
Continuous drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current per MOSFET
CONDITIONS
T
j
= 25 藲C to 150藲C
T
j
= 25 藲C to 150藲C;
R
GS
= 20 k鈩?/div>
MIN.
-
-
-
-
-
-
-
-
-
-
- 65
MAX.
100
100
鹵
20
3
2.4
2.2
1.7
12
2
1.3
150
UNIT
V
V
V
A
A
A
A
A
W
W
藲C
T
a
= 25 藲C, t
鈮?/div>
10 s
T
a
= 70 藲C, t
鈮?/div>
10 s
Drain current per MOSFET (both
T
a
= 25 藲C, t
鈮?/div>
10 s
MOSFETs conducting)
T
a
= 70 藲C, t
鈮?/div>
10 s
Drain current (pulse peak value per T
a
= 25 藲C
MOSFET)
Total power dissipation
T
a
= 25 藲C, t
鈮?/div>
10 s
T
a
= 70 藲C, t
鈮?/div>
10 s
Storage & operating temperature
THERMAL RESISTANCES
SYMBOL PARAMETER
R
th j-a
R
th j-a
Thermal resistance junction
to ambient
Thermal resistance junction
to ambient
CONDITIONS
Surface mounted on FR4 board, t
鈮?/div>
10
sec; either or both MOSFETs conducting
Surface mounted on FR4 board; either or
both MOSFETs conducting
TYP.
-
150
MAX.
62.5
-
UNIT
K/W
K/W
August 1999
1
Rev 1.000

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