鈮?/div>
0.4 V
d
g
GENERAL DESCRIPTION
P-channel, enhancement mode,
logic level, field-effect power
transistor. This device has low
threshold voltage and extremely
fast switching making it ideal for
battery powered applications and
high speed digital interfacing.
The PHK04P02T is supplied in the
SOT96-1 (SO8) surface mounting
package.
PINNING
PIN
1,2,3
4
DESCRIPTION
source
gate
SOT96-1
8
7
6
5
5,6,7,8 drain
pin 1 index
1
2
3
4
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
, T
j
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
CONDITIONS
R
GS
= 20 k鈩?/div>
T
sp
= 25 藲C
T
sp
= 100 藲C
T
sp
= 25 藲C
T
sp
= 25 藲C
T
sp
= 100 藲C
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
-16
-16
鹵
8
-4.66
-1.87
-26.4
5.0
2.0
150
UNIT
V
V
V
A
A
A
W
W
藲C
THERMAL RESISTANCES
SYMBOL
R
th j-sp
PARAMETER
Thermal resistance junction to
solder point
CONDITIONS
mounted on metal clad substrate.
TYP.
25
MAX.
-
UNIT
K/W
May 2002
1
Rev 1.000
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