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PE3335EK Datasheet

  • PE3335EK

  • 3000 MHz UltraCMOS⑩ Integer-N PLL for Low Phase Noise Appli...

  • 15頁

  • PEREGRINE

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Product Specification
PE3335
Product Description
Peregrine鈥檚 PE3335 is a high performance integer-N PLL
capable of frequency synthesis up to 3000 MHz. The
superior phase noise performance of the PE3335 makes it
ideal for applications such as LMDS / MMDS / WLL
basestations and demanding terrestrial systems.
The PE3335 features a 10/11 dual modulus prescaler,
counters, phase comparator and a charge pump as shown
in Figure 1. Counter values are programmable through
either a serial or parallel interface and can also be directly
hard wired.
The PE3335 Phase Locked-Loop is optimized for terrestrial
applications. It is manufactured on Peregrine鈥檚
UltraCMOS鈩?process, a patented variation of silicon-on-
insulator (SOI) technology on a sapphire substrate, offering
the performance of GaAs with the economy and integration
of conventional CMOS.
3000 MHz UltraCMOS鈩?Integer-N PLL
for Low Phase Noise Applications
Features
鈥?/div>
3000 MHz operation
鈥?/div>
梅10/11 dual modulus prescaler
鈥?/div>
Internal phase detector with
charge pump
鈥?/div>
Serial, parallel or hardwired
programmable
鈥?/div>
Ultra-low phase noise
鈥?/div>
Available in 44-lead PLCC and
7x7 mm 48-lead QFN packages
Figure 1. Block Diagram
F
in
F
in
Prescaler
10/11
Main
Counter
13
f
p
D(7:0)
8
Sdata
Pre_en
M(6:0)
A(3:0)
R(3:0)
f
r
Primary
20-bit
20
Latch
Secon-
dary
20-bit
Latch
20
20
20
16
Phase
Detector
PD_U
PD_D
Charge
Pump
CP
6
6
f
c
R Counter
Document No. 70-0049-02
鈹?/div>
www.psemi.com
漏2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 15

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