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PE3293 Datasheet

  • PE3293

  • 1.8GHz/550MHz Dual Fractional-N Ultra-Low Spurious PLL for F...

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PRODUCT SPECIFICATION
PE3293
Product Description
The PE3293 is a dual fractional-N phase-lock loop (PLL)
IC designed for frequency synthesis and fabricated on
Peregrine鈥檚 patented UTSi廬 CMOS process. Each PLL
includes a prescaler, phase detector, charge pump and
on-board fractional spur compensation.
The patented spur compensation circuitry designed into
the device ensures superior spur performance over the
full temperature and VCO tuning range.
The PE3293 provides fractional-N division with power-of-
two denominator values up to 32. This allows
comparison frequencies up to 32 times the channel
spacing, providing a lower phase noise floor than integer
PLLs. The 32/33 RF prescaler (PLL1) operates up to 1.8
GHz and the 16/17 IF prescaler (PLL2) operates up to
550 MHz.
Applications
鈥?/div>
Triple mode,dual-band PCS / Cellular handset
鈥?/div>
PCS/CDMA/Cellular handsets
鈥?/div>
PCS/CDMA/Cellular base stations
Figure 1. Block Diagram
1.8 GHz / 550 MHz Dual
Fractional-N Ultra-Low
Spurious PLL for Frequency
Synthesis
Features
鈥?/div>
Industry leading fractional spur
compensation: no adjusting
required, stable over temp.
鈥?/div>
Ultra-Low Power consumption:
4.0 mA typical, both loops
operating
鈥?/div>
Modulo-32 fractional-N main
counters
鈥?/div>
Supply voltage range 2.7 to 3.3
VDC
f
in
1
32/33
Prescaler
19-bit Fractional-N
Main Divider
Fractional Spur
Compensation
f
r
Ref.
Amp.
9-bit Reference
Divider
Phase
Detector
Charge
Pump
CP1
Clock
Data
LE
21-bit Serial Control
Interface
Multiplexer
f
o
LD
9-bit Reference
Divider
Phase
Detector
Charge
Pump
CP2
f
in
2
16/17
Prescaler
18-bit Fractional-N
Main Divider
Fractional Spur
Compensation
PEREGRINE SEMICONDUCTOR CORP.
餂?/div>
|
http://www.peregrine-semi.com
Copyright
餂?/div>
Peregrine Semiconductor Corp. 2003
Page 1 of 18

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