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Cascadable 16-bit counters
TTL compatible
5V and 3.3V Operation
8 Bit parallel tristatable Bus
Simple read & write procedure
High speed 20 MHz clock operation
Direction discriminators identify &
measure forward/backward rotation
separate zero pulse input
New Feature:
Each channel extendable to 24 Bit
READY
KLI-KLO1
63
62
KLI-KLO2
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
39
40
41
42
44
A3
RESET
Ua01
Ua02
Ua03
A0
RD
WE
6
5
NC
9
8
7
4
3
2
1
68
65
64
67
66
NC
GND
NC
VCC
CLK
A1
A2
CS
GND
D0
D1
VCC
D2
D3
GND
D4
D5
VCC
D6
D7
GND
NC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
31
32
33
37
38
27
28
29
30
34
35
36
43
26
KLI-KLO3
CARRY1
BORROW1
CARRY2
BORROW2
CARRY3
BORROW3
GND
VCC
DOWN3
UP3
DOWN2
UP2
DOWN1
UP1
Ua23
Ua13
PE12316
PLCC68
Ua11
NC
Ua21
Ua12
Ua22
M01
M11
M21
M02
NC
M12
M22
M03
M13
M23
NC
NC
Figure 1 Pinout
NC Pins should be left open
and not connected to the
PCB. They are reserved for
future upgrades.
Description:
The PE12316 TRIPLE INCREMENTAL ENCODER INTERFACE consists of three channels each,
which can independently determine the direction of displacement of a mechanical or axis based device
on two input signals from transducers in quadrature. Alternatively, each channel can measure a pulse
width using a known clock rate, or a frequency, by counting input pulses over a known time interval. It
includes three 16/24-bit counters which may also be used separately. The PE12316 may be cascaded
between channels on one device or between devices to provide accuracy greater than 16/24-bits, and
is designed for use in many microprocessor-based systems.
February 6, 2003 (Preliminary Version 1.1)
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PE12316