鈥?/div>
Total programmed delay tolerance:
5% or 40ps,
whichever is greater
Inherent delay (TD
0
):
2.2ns typical
Address to input setup (T
AIS
):
2.9ns
Operating temperature:
0擄 to 85擄 C
Temperature coefficient:
100PPM/擄C (excludes TD
0
)
Supply voltage V
EE
:
-5VDC
鹵
0.7V
Power Supply Current:
-150ma typical (50鈩?to -2V)
Minimum pulse width:
3ns or 15% of total delay,
whichever is greater
Minimum period:
8ns or 2 x pulse width, whichever
is greater
A
i-1
PW
IN
IN
TD
A
OUT
Figure 1: Timing Diagram
餂?997
Data Delay Devices
DASH NUMBER SPECIFICATIONS
Part
Number
PDU53-100
PDU53-200
PDU53-250
PDU53-400
PDU53-500
PDU53-750
PDU53-1000
PDU53-1200
PDU53-1500
PDU53-2000
PDU53-2500
PDU53-3000
Incremental Delay
Per Step (ps)
100
鹵
50
200
鹵
60
250
鹵
60
400
鹵
80
500
鹵
100
750
鹵
100
1000
鹵
200
1200
鹵
200
1500
鹵
200
2000
鹵
400
2500
鹵
400
3000
鹵
500
Total Delay
Change (ns)
0.70
1.40
1.75
2.80
3.50
5.25
7.00
8.40
10.50
14.00
17.50
21.00
A2-A0
A
i
T
OAX
T
AIS
NOTE: Any dash number between 100 and 3000
not shown is also available.
PW
OUT
Doc #98003
3/18/98
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1