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PDIUSBD12PWDH Datasheet

  • PDIUSBD12PWDH

  • Controller Miscellaneous - Datasheet Reference

  • 36頁(yè)

  • ETC

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PDIUSBD12
USB interface device with parallel bus
Rev. 06 鈥?23 April 2001
Product data
1. Description
The PDIUSBD12 is a cost and feature optimized USB device. It is normally used in
microcontroller based systems and communicates with the system microcontroller
over the high-speed general purpose parallel interface. It also supports local DMA
transfer.
This modular approach to implementing a USB interface allows the designer to
choose the optimum system microcontroller from the available wide variety. This
鏗俥xibility cuts down the development time, risks, and costs by allowing the use of the
existing architecture and minimize 鏗乺mware investments. This results in the fastest
way to develop the most cost effective USB peripheral solution.
The PDIUSBD12 fully conforms to the
USB speci鏗乧ation Rev. 1.1.
It is also designed
to be compliant with most device class speci鏗乧ations: Imaging Class, Mass Storage
Devices, Communication Devices, Printing Devices, and Human Interface Devices.
As such, the PDIUSBD12 is ideally suited for many peripherals like Printer, Scanner,
External Mass Storage (Zip Drive), Digital Still Camera, etc. It offers an immediate
cost reduction for applications that currently use SCSI implementations.
The PDIUSBD12 low suspend power consumption along with the LazyClock output
allows for easy implementation of equipment that is compliant to the ACPI鈩?
OnNOW鈩? and USB power management requirements. The low operating power
allows the implementation of bus powered peripherals.
In addition, it also incorporates features like SoftConnect鈩? GoodLink鈩?
programmable clock output, low frequency crystal oscillator, and integration of
termination resistors. All of these features contribute to signi鏗乧ant cost savings in the
system implementation and at the same time ease the implementation of advanced
USB functionality into the peripherals.
c
c
2. Features
s
Complies with the
Universal Serial Bus speci鏗乧ation Rev. 1.1
s
High performance USB interface device with integrated SIE, FIFO memory,
transceiver and voltage regulator
s
Compliant with most Device Class speci鏗乧ations
s
High-speed (2 Mbytes/s) parallel interface to any external microcontroller or
microprocessor
s
Fully autonomous DMA operation

PDIUSBD12PWDH 產(chǎn)品屬性

  • NXP

  • USB 接口集成電路

  • 4 V to 5.5 V

  • Tube

  • 51

  • PDIUSBD12PW,112

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