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PCKEP14 Datasheet

  • PCKEP14

  • 2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver

  • 15頁

  • ETC

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PCKEP14
2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
Rev. 01 鈥?30 October 2002
Product data
1. Description
The PCKEP14 is a low skew 1-to-5 differential driver, designed with clock distribution
in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input
signals can be either differential or single-ended (if the V
BB
output is used). HSTL
inputs can be used when the PCKEP14 is operating under PECL conditions.
The PCKEP14 speci鏗乧ally guarantees low output-to-output skew. Optimal design,
layout, and processing minimize skew within a device, and from device to device.
To ensure that the tight skew speci鏗乧ation is realized, both sides of any differential
output need to be terminated identically into 50
鈩?/div>
resistors, even if only one output is
being used. If an output pair is unused, both outputs may be left open (unterminated)
without affecting skew.
The common enable (EN) is synchronous, outputs are enabled/disabled in the LOW
state. This avoids a runt clock pulse when the device is enabled/disabled, as can
happen with an asynchronous control. The internal 鏗俰p-鏗俹p is clocked on the falling
edge of the input clock, therefore, all associated speci鏗乧ation limits are referenced to
the negative edge of the clock input.
The PCKEP14, as with most other ECL devices, can be operated from a positive V
CC
supply in PECL mode. This allows the PCKEP14 to be used for high performance
clock distribution in +3.3 V or +2.5 V systems.
2. Features
s
s
s
s
s
s
s
s
s
100 ps device-to-device skew
25 ps within device skew
400 ps typical propagation delay
Maximum frequency > 2 GHz (typical)
Contains temperature compensation
PECL and HSTL mode: V
CC
= 2.375 V to 3.8 V with V
EE
= 0 V
NECL mode: V
CC
= 0 V with V
EE
=
鈭?.375
V to
鈭?.8
V
LVDS input compatible
Open input default state.

PCKEP14相關型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    2.5 V/3.3 V PECL/ECL 1:5 clock distribution chip
    ETC
  • 英文版
    2.5 V/3.3 V PECL/ECL 1:5 clock distribution chip
    Philips
  • 英文版
    2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
    ETC
  • 英文版
    2.5 V/3.3 V 1:5 differential ECL/PECL/HSTL clock driver
    Philips

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