音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

PCI9656-AC66BI Datasheet

  • PCI9656-AC66BI

  • Controller Miscellaneous - Datasheet Reference

  • 312.02KB

  • 4頁

  • ETC

掃碼查看芯片數(shù)據(jù)手冊

上傳產品規(guī)格書

PDF預覽

VERSION 1.0
2002
PCI 9656
Connectivity
s
s
64-bit, 66MHz PCI r2.2 compliant
Motorola PowerQUICC and
generic 32-bit, 66MHz local
bus modes
3.3V I/O, 5V tolerant bus
interfaces
PICMG 2.1 r2.0 Hot Swap Silicon
272-ball, 27 x 27 mm, 1.27 mm
pitch PBGA
Zero wait state burst operation
64-bit, 66MHz PCI Bus Mastering I/O Accelerator for Motorola
PowerQUICC
鈩?/div>
& Generic 32-bit, 66MHz Local Bus Designs
Maximum PCI Bandwidth for Your 32-bit Local Bus Applications
The PCI 9656 offers flexible connectivity and high performance I/O acceleration features
to enable leading edge PCI, CompactPCI, and embedded host designs.
Motorola
廬
MPC 850/860 PowerQUICC Designs
The PCI 9656 is the perfect match for the industry leading 32-bit communication proces-
sor, the Motorola MPC 850/860 PowerQUICC. The PCI 9656 provides a direct connection
to PowerQUICC devices, enabling high-speed 64-bit, 66MHz PCI performance with its
Data Pipe Architecture鈩?technology.
Generic 32-bit, 66MHz Local Bus Designs
The PCI 9656 provides direct connection to two generic industry standard interconnect
buses. Designers use these 32-bit, 66MHz buses for a myriad of high-speed devices rang-
ing from processors, to DSPs, to memories, to custom ASICs and FPGAs.
The PCI 9656 Data Pipe Architecture technology enables high-speed, 64-bit, 66MHz PCI
I/O with those devices.
s
s
s
Performance
s
鈥?/div>
PCI bus bursts to 528 MB/sec
鈥?/div>
Local bus bursts to 264 MB/sec
s
2 DMA Channels
鈥?/div>
Block and Scatter/Gather transfers
鈥?/div>
DMA descriptor ring management
鈥?/div>
Demand Mode and EOT
Hardware controls
s
Direct Master data transfers
鈥?/div>
Generate any PCI transaction
鈥?/div>
Read ahead and programmable
read prefetch counter
s
Move Your 32-bit Local Bus Designs Up to
64-bit, 66MHz PCI Operation
As PCI evolves to meet the ever increasing I/O demands of leading edge systems, PLX
continues to provide leading edge, high performance PCI I/O acceleration solutions. Based
on the architecture of the industry-leading PCI 9054, the PCI 9656 offers a variety of
enhancements for the needs of today's telecom, networking, and I/O adapter designs:
s
s
s
s
Direct Slave data transfers
鈥?/div>
Access 8-, 16-, and 32-bit local
bus devices
鈥?/div>
Deferred reads, deferred writes,
read ahead, posted writes, pro-
grammable read prefetch counter
64-bit, 66MHz PCI operation
32-bit, 66MHz local bus operation
Dynamic DMA descriptor ring management with Valid bit semaphore control
PICMG 2.1 r2.0 Hot Swap Silicon, including Bias Voltage, Early Power, 64-bit
Initialization, and Intially Not Responding Support
PCI Power Management r1.1 D3
COLD
Power Management Event (PME) generation
PCI arbiter supporting 7 external masters
Reset and interrupt pins configurable for embedded host applications
JTAG boundary scan
Control
s
s
I2O r1.5 messaging unit
Eight mailbox and two
doorbell registers
PCI arbiter supports 7
external masters
Host mode reset/interrupt signal
configuration
PCI D3
COLD
Power Management
Event (PME) generation support
Serial EEPROM interface
JTAG boundary scan
s
s
s
s
s
The PCI 9656 is register compatible with the PCI 9054, enabling easy software migration.
s
s
s
s

PCI9656-AC66BI相關型號PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務：
賣家服務：
技術客服：

0571-85317607

網(wǎng)站技術支持

13606545031

客服在線時間周一至周五
9:00-17:30

關注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務的動力！意見一經采納，將有感恩紅包奉上哦！