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PCA9306GM Datasheet

  • PCA9306GM

  • Dual bidirectional I2C-bus and SMBus voltage-level translato...

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PCA9306
Dual bidirectional I
2
C-bus and SMBus voltage-level translator
Rev. 02 鈥?21 February 2007
Product data sheet
1. General description
The PCA9306 is a dual bidirectional I
2
C-bus and SMBus voltage-level translator with an
enable (EN) input, and is operational from 1.1 V to 3.6 V (V
ref(1)
) and 2.3 V to 5.5 V
(V
bias(ref)(2)
).
The PCA9306 allows bidirectional voltage translations between 1.2 V and 5 V without the
use of a direction pin. The low ON-state resistance (R
on
) of the switch allows connections
to be made with minimal propagation delay. When EN is HIGH, the translator switch is on,
and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively,
allowing bidirectional data 鏗俹w between ports. When EN is LOW, the translator switch is
off, and a high-impedance state exists between ports.
In I
2
C-bus applications, the bus capacitance limit of 400 pF restricts the number of devices
and bus length. Using the PCA9306 enables the system designer to isolate two halves of
a bus, thus more I
2
C-bus devices or longer trace length can be accommodated by using
the enable pin. The PCA9306 is not a bus buffer like the PCA9509 or PCA9517 that
provides level translation and physically isolates the capacitance to either side of the bus
even when both sides are connected.
The PCA9306 can also be used to run two buses, one at 400 kHz operating frequency
and the other at 100 kHz operating frequency. If the two buses are operating at different
frequencies, the 100 kHz bus must be isolated when the 400 kHz operation of the other
bus is required. If the master is running at 400 kHz, the maximum system operating
frequency may be less than 400 kHz because of the delays added by the translator.
As with the standard I
2
C-bus system, pull-up resistors are required to provide the logic
HIGH levels on the translator鈥檚 bus. The PCA9306 has a standard open-collector
con鏗乬uration of the I
2
C-bus. The size of these pull-up resistors depends on the system,
but each side of the translator must have a pull-up resistor. The device is designed to work
with Standard-mode, Fast-mode and Fast mode Plus I
2
C-bus devices in addition to
SMBus devices.
When the SDA1 or SDA2 port is LOW, the clamp is in the ON-state and a low resistance
connection exists between the SDA1 and SDA2 ports. Assuming the higher voltage is on
the SDA2 port when the SDA2 port is HIGH, the voltage on the SDA1 port is limited to the
voltage set by VREF1. When the SDA1 port is HIGH, the SDA2 port is pulled to the drain
pull-up supply voltage (V
pu(D)
) by the pull-up resistors. This functionality allows a seamless
translation between higher and lower voltages selected by the user without the need for
directional control. The SCL1/SCL2 channel also functions as the SDA1/SDA2 channel.

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