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P620-00DC Datasheet

  • P620-00DC

  • Low Phase Noise XO with multipliers (for HF Fund. and 3rd O....

  • 205.48KB

  • 7頁

  • PLL

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PLL620-00
Low Phase Noise XO with multipliers (for HF Fund. and 3
rd
O.T.)
FEATURES
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
100MHz to 200MHz Fundamental or 3
rd
Overtone Crystal input.
Output range: 100 鈥?200MHz (no multiplication),
200 鈥?400MHz (2x multiplier) or 400 鈥?700MHz
(4x multiplier).
Available outputs: PECL, LVDS, or CMOS (High
Drive (30mA) or Standard Drive (10mA) output).
Supports 3.3V-Power Supply.
Available in die form.
Thickness 10 mil.
DIE CONFIGURATION
65 mil
OUTSEL0^
OUTSEL1^
SEL0^
SEL1^
VDD
VDD
VDD
VDD
(1550,1475)
17
16
25
24
23
22
21
20
19
18
GNDBUF
CMOS
LVDSB
PECLB
VDDBUF
VDDBUF
PECL
LVDS
OE_SEL^
XIN
XOUT
SEL3^
62 mil
26
27
Die ID:
A1010-10A
15
28
14
SEL2^
OE
CTRL
NC
13
29
12
11
30
DESCRIPTION
The PLL620-00 is an XO IC specifically designed to
work with high frequency fundamental and third
overtone crystals. Its design was optimized to
tolerate higher limits of interelectrode capacitance
and bonding capacitance to improve yield. It
achieves very low current into the crystal resulting in
better overall stability. It is ideal for XO applications
requiring LVDS or PECL output levels at high
frequencies.
C502A
31
1
2
3
4
5
6
7
8
10
9
Y
(0,0)
X
OUTPUT SELECTION AND ENABLE
OUTSEL1
(Pad #18)
0
0
1
1
OE_SELECT
(Pad #9)
OUTSEL0
(Pad #25)
0
1
0
1
OE_CTRL
(Pad #30)
0
1 (Default)
0 (Default)
1
Selected Output
High Drive CMOS
Standard CMOS
LVDS
PECL (default)
State
Tri-state
Output enabled
Output enabled
Tri-state
DIE SPECIFICATIONS
Name
Size
Reverse side
Pad dimensions
Thickness
Value
62 x 65 mil
GND
80 micron x 80 micron
10 mil
BLOCK DIAGRAM
SEL
OE
Vin
X+
X-
PLL by-pass
0
1 (Default)
Oscillator
Amplifier
PLL
(Phase
Locked
Loop)
Q
Q
Pad #9: Bond to GND to set to 鈥?鈥? bond to VDD to set to 鈥?鈥?/div>
Pad #30: Logical states defined by PECL levels if OE_SELECT (pad
#9) is 鈥?鈥?/div>
Logical states defined by CMOS levels if OE_SELECT is
鈥?鈥?/div>
PLL620-00
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/03/04 Page 1
GNDBUF
GND
NC
GND
GND
GND
GND
GND

P620-00DC相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    Low Phase Noise XO with multipliers (for HF Fund. and 3rd O....
    PLL
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PhaseLink Corpo...
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PLL
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PhaseLink Corpo...
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PLL
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PhaseLink Corpo...
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PhaseLink Corpo...
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PLL
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PhaseLink Corpo...
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PhaseLink Corpo...
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PLL
  • 英文版
    Low Phase Noise XO (for HF Fund. and 3-rd O.T.)
    PLL
  • 英文版
    PECL and LVDS Low Phase Noise XO (32.5 to 130MHz output)
    PLL
  • 英文版
    Low Phase Noise XO (9.5-65MHz Output)
    PLL
  • 英文版
    Low Phase Noise XO (9.5-65MHz Output)
    PhaseLink Corpo...
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PhaseLink Corpo...
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PLL
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PLL
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PhaseLink Corpo...
  • 英文版
    Low Phase Noise XO with multipliers (for 100-200MHz Fund or ...
    PLL

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