NIKO-SEM
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P3056LS
TO-263
D
PRODUCT SUMMARY
V
(BR)DSS
25
R
DS(ON)
50m惟
I
D
12A
1. GATE
2. DRAIN
3. SOURCE
G
S
ABSOLUTE MAXIMUM RATINGS (T
C
= 25
擄C
Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
Avalanche Energy
Repetitive Avalanche Energy
Power Dissipation
2
1
SYMBOL
V
GS
LIMITS
鹵12
12
8
45
60
3
43
15
-55 to 150
275
UNITS
V
T
C
= 25 擄C
T
C
= 100 擄C
I
D
I
DM
A
L = 0.1mH
L = 0.05mH
T
C
= 25 擄C
T
C
= 100 擄C
E
AS
E
AR
P
D
T
j
, T
stg
T
L
mJ
W
Operating Junction & Storage Temperature Range
Lead Temperature ( /
16
鈥?from case for 10 sec.)
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
Junction-to-Case
Junction-to-Ambient
Case-to-Heatsink
1
2
1
擄C
SYMBOL
R
胃JC
R
胃JA
R
胃CS
TYPICAL
MAXIMUM
2.6
60
UNITS
擄C / W
0.6
Pulse width limited by maximum junction temperature.
Duty cycle
鈮?/div>
1%
ELECTRICAL CHARACTERISTICS (T
C
= 25
擄C,
Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
STATIC
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
V
(BR)DSS
V
GS(th)
I
GSS
I
DSS
V
GS
= 0V, I
D
= 250碌A
V
DS
= V
GS
, I
D
= 250碌A
V
DS
= 0V, V
GS
= 鹵12V
V
DS
= 20V, V
GS
= 0V
V
DS
= 20V, V
GS
= 0V, T
J
= 125 擄C
25
0.5
0.7
1.0
鹵250 nA
25
250
碌A
V
LIMITS
UNIT
MIN TYP MAX
1
AUG-09-2001
1
2
3
