NIKO-SEM
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
D
P2503BDG
TO-252
Lead-Free
PRODUCT SUMMARY
V
(BR)DSS
30
R
DS(ON)
25m惟
I
D
12A
G
S
1.GATE
2.DRAIN
3.SOURCE
ABSOLUTE MAXIMUM RATINGS (T
C
= 25
擄C
Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
1
Power Dissipation
Junction & Storage Temperature Range
T
C
= 25 擄C
T
C
= 70 擄C
T
C
= 25 擄C
T
C
= 70 擄C
SYMBOL
V
DS
V
GS
I
D
I
DM
P
D
T
j
, T
stg
LIMITS
30
鹵20
12
10
30
32
22
-55 to 150
擄C
W
A
UNITS
V
V
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
Junction-to-Case
Junction-to-Ambient
1
2
SYMBOL
R
胃J
c
R
胃JA
TYPICAL
MAXIMUM
3
75
UNITS
擄C / W
擄C / W
Pulse width limited by maximum junction temperature.
Duty cycle
鈮?/div>
1%
ELECTRICAL CHARACTERISTICS (T
C
= 25
擄C,
Unless Otherwise Noted)
LIMITS
PARAMETER
SYMBOL
TEST CONDITIONS
STATIC
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
V
(BR)DSS
V
GS(th)
I
GSS
V
GS
= 0V, I
D
= 250碌A(chǔ)
V
DS
= V
GS
, I
D
= 250碌A(chǔ)
V
DS
= 0V, V
GS
= 鹵20V
V
DS
= 24V, V
GS
= 0V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 20V, V
GS
= 0V, T
J
= 55 擄C
30
1
1.5
2.5
鹵250
1
10
碌A(chǔ)
V
nA
MIN
TYP MAX
UNIT
1
SEP-30-2004
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