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NTMSD3P303R2/D Datasheet

  • NTMSD3P303R2/D

  • FETKY?

  • 12頁

  • ETC

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NTMSD3P303R2
Product Preview
FETKY鈩?/div>
P鈥揅hannel Enhancement鈥揗ode
Power MOSFET and Schottky Diode
Dual SO鈥? Package
Features
http://onsemi.com
鈥?/div>
High Efficiency Components in a Single SO鈥? Package
鈥?/div>
High Density Power MOSFET with Low RDS(on),
Schottky Diode with Low VF
鈥?/div>
Independent Pin鈥揙uts for MOSFET and Schottky Die
Allowing for Flexibility in Application Use
鈥?/div>
Less Component Placement for Board Space Savings
鈥?/div>
SO鈥? Surface Mount Package,
Mounting Information for SO鈥? Package Provided
Applications
MOSFET
鈥?.05 AMPERES
鈥?0 VOLTS
0.085
W
@ VGS = 鈥?0 V
SCHOTTKY DIODE
3.0 AMPERES
30 VOLTS
420 mV @ IF = 3.0 A
A
8
1
A
S
G
1
2
3
4
5
8
7
6
C
C
D
D
鈥?/div>
DC鈥揇C Converters
鈥?/div>
Low Voltage Motor Control
鈥?/div>
Power Management in Portable and Battery鈥揚owered Products, i.e.:
Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones
MOSFET MAXIMUM RATINGS
(TJ = 25擄C unless otherwise noted)
Rating
Drain鈥搕o鈥揝ource Voltage
Gate鈥搕o鈥揝ource Voltage 鈥?Continuous
Thermal Resistance 鈥?/div>
Junction鈥搕o鈥揂mbient (Note 1.)
Total Power Dissipation @ TA = 25擄C
Continuous Drain Current @ TA = 25擄C
Continuous Drain Current @ TA = 70擄C
Pulsed Drain Current (Note 4.)
Thermal Resistance 鈥?/div>
Junction鈥搕o鈥揂mbient (Note 2.)
Total Power Dissipation @ TA = 25擄C
Continuous Drain Current @ TA = 25擄C
Continuous Drain Current @ TA = 70擄C
Pulsed Drain Current (Note 4.)
Thermal Resistance 鈥?/div>
Junction鈥搕o鈥揂mbient (Note 3.)
Total Power Dissipation @ TA = 25擄C
Continuous Drain Current @ TA = 25擄C
Continuous Drain Current @ TA = 70擄C
Pulsed Drain Current (Note 4.)
Operating and Storage
Temperature Range
Single Pulse Drain鈥搕o鈥揝ource Avalanche
Energy 鈥?Starting TJ = 25擄C (VDD =
鈥?0 Vdc, VGS = 鈥?.5 Vdc, Peak IL =
鈥?.5 Apk, L = 5 mH, RG = 25
鈩?
Maximum Lead Temperature for Soldering
Purposes, 1/8鈥?from case for 10 seconds
1.
2.
3.
4.
Symbol
VDSS
VGS
R
胃JA
PD
ID
ID
IDM
R
胃JA
PD
ID
ID
IDM
R
胃JA
PD
ID
ID
IDM
TJ, Tstg
EAS
Value
鈥?0
"20
171
0.73
鈥?.34
鈥?.87
鈥?.0
100
1.25
鈥?.05
鈥?.44
鈥?2
62.5
2.0
鈥?.86
鈥?.10
鈥?5
鈥?5 to
+150
140
Unit
V
V
擄C/W
W
A
A
A
擄C/W
W
A
A
A
擄C/W
W
A
A
A
擄C
mJ
SO鈥?
CASE 751
STYLE 18
(TOP VIEW)
MARKING DIAGRAM
& PIN ASSIGNMENTS
Anode
Anode
Source
Gate
1
2
3
4
(Top View)
E3P303
L
Y
WW
= Device Code
= Assembly Location
= Year
= Work Week
E3P303
LYWW
8
7
6
5
Cathode
Cathode
Drain
Drain
ORDERING INFORMATION
Device
TL
260
擄C
NTMSD3P303R2
Package
SO鈥?
Shipping
2500/Tape & Reel
Minimum FR鈥? or G鈥?0 PCB, Steady State.
Mounted onto a 2鈥?square FR鈥? Board (1鈥?sq. 2 oz Cu 0.06鈥?thick single sided), Steady State.
Mounted onto a 2鈥?square FR鈥? Board (1鈥?sq. 2 oz Cu 0.06鈥?thick single sided), t
鈮?/div>
10 seconds.
Pulse Test: Pulse Width = 300
ms,
Duty Cycle = 2%.
This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice.
漏
Semiconductor Components Industries, LLC, 2001
1
January, 2001 鈥?Rev. 0
Publication Order Number:
NTMSD3P303R2/D

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