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NTMD6N02R2 Datasheet

  • NTMD6N02R2

  • Power MOSFET 6.0 Amps, 20 Volts

  • 6頁

  • ONSEMI

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NTMD6N02R2
Power MOSFET
6.0 Amps, 20 Volts
N鈭扖hannel Enhancement Mode
Dual SO鈭? Package
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Ultra Low R
DS(on)
Higher Efficiency Extending Battery Life
Logic Level Gate Drive
Miniature Dual SO鈭? Surface Mount Package
Diode Exhibits High Speed, Soft Recovery
Avalanche Energy Specified
SO鈭? Mounting Information Provided
http://onsemi.com
V
DSS
20 V
R
DS(ON)
TYP
35 m鈩?@ V
GS
= 4.5 V
I
D
MAX
6.0 A
N鈭扖hannel
D
Applications
鈥?/div>
DC鈭扗C Converters
鈥?/div>
Low Voltage Motor Control
鈥?/div>
Power Management in Portable and Battery鈭扨owered Products, for
example, Computers, Printers, Cellular and Cordless Telephones and
PCMCIA Cards
MAXIMUM RATINGS
(T
J
= 25擄C unless otherwise noted)
Rating
Drain鈭抰o鈭扴ource Voltage
Drain鈭抰o鈭扜ate Voltage (R
GS
= 1.0 MW)
Gate鈭抰o鈭扴ource Voltage 鈭?Continuous
Thermal Resistance 鈭?/div>
Junction鈭抰o鈭扐mbient (Note 1)
Total Power Dissipation @ T
A
= 25擄C
Continuous Drain Current @ T
A
= 25擄C
Continuous Drain Current @ T
A
= 70擄C
Pulsed Drain Current (Note 4)
Thermal Resistance 鈭?/div>
Junction鈭抰o鈭扐mbient (Note 2)
Total Power Dissipation @ T
A
= 25擄C
Continuous Drain Current @ T
A
= 25擄C
Continuous Drain Current @ T
A
= 70擄C
Pulsed Drain Current (Note 4)
Thermal Resistance 鈭?/div>
Junction鈭抰o鈭扐mbient (Note 3)
Total Power Dissipation @ T
A
= 25擄C
Continuous Drain Current @ T
A
= 25擄C
Continuous Drain Current @ T
A
= 70擄C
Pulsed Drain Current (Note 4)
Symbol
V
DSS
V
DGR
V
GS
R
胃JA
P
D
I
D
I
D
I
DM
R
胃JA
P
D
I
D
I
D
I
DM
R
胃JA
P
D
I
D
I
D
I
DM
Value
20
20
"12
62.5
2.0
6.5
5.5
50
102
1.22
5.07
4.07
40
172
0.73
3.92
3.14
30
Unit
V
V
V
擄C/W
W
A
A
A
擄C/W
W
A
A
A
擄C/W
W
A
A
A
8
G
S
1
SO鈭?
CASE 751
STYLE 11
MARKING DIAGRAM
& PIN ASSIGNMENT
Source 1
Gate 1
Source 2
Gate 2
1
2
3
4
(Top View)
E6N02
L
Y
WW
= Device Code
= Assembly Location
= Year
= Work Week
E6N02
LYWW
8
7
6
5
Drain 1
Drain 1
Drain 2
Drain 2
1. Mounted onto a 2鈥?square FR鈭? Board
(1鈥?sq. 2 oz. Cu 0.06鈥?thick single sided), t < 10 seconds.
2. Mounted onto a 2鈥?square FR鈭? Board
(1鈥?sq. 2 oz. Cu 0.06鈥?thick single sided), t = steady state.
3. Minimum FR鈭? or G鈭?0 PCB, t = steady state.
4. Pulse Test: Pulse Width = 10
ms,
Duty Cycle = 2%.
ORDERING INFORMATION
Device
NTMD6N02R2
Package
SO鈭?
Shipping
鈥?/div>
2500/Tape & Reel
鈥燜or information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
漏
Semiconductor Components Industries, LLC, 2004
1
April, 2004 鈭?Rev. 2
Publication Order Number:
NTMD6N02R2/D

NTMD6N02R2 產(chǎn)品屬性

  • 2,500

  • 分離式半導體產(chǎn)品

  • FET - 陣列

  • -

  • 2 個 N 溝道（雙）

  • 邏輯電平門

  • 20V

  • 3.92A

  • 35 毫歐 @ 6A，4.5V

  • 1.2V @ 250µA

  • 20nC @ 4.5V

  • 1100pF @ 16V

  • 730mW

  • 表面貼裝

  • 8-SOIC（0.154"，3.90mm 寬）

  • 8-SOICN

  • 帶卷 (TR)

  • NTMD6N02R2OS

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