NTE887M
Integrated Circuit
Low Power, JFET OP Amplifier
Description:
The NTE887M is a JFET鈥搃nput operational amplifier in an 8鈥揕ead DIP type package designed as a
low鈥損ower version of the NTE857M amplifier. This device features high input impedance, wide band-
width, high slew rate, and low input offset and bias current.
Features:
D
Very Low Power Consumption
D
Typical Supply Current: 200碌A(chǔ)
D
Wide Common鈥揗ode and Differential Voltage Ranges
D
Low Input Bias and Offset Currents
D
Common鈥揗ode Input Voltage Range Includes V
CC
+
D
Output Short鈥揅ircuit Protection
D
High Input Impedance: JFET鈥揑nput Stage
D
Internal Frequency Compensation
D
Latch鈥揢p鈥揊ree Operation
D
High Slew rate: 3.5V/碌s Typ
Absolute Maximum Ratings:
(T
A
= 0擄 to +70擄C unless otherwise specified)
Supply Voltage (Note 1), V
CC
+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18V
Supply Voltage (Note 1), V
CC
鈥?. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?8V
Differential Input Voltage (Note 2), V
ID
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
鹵30V
Input Voltage (Note 1, Note 3), V
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
鹵15V
Duration of Output Short Circuit (Note 4), t
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited
Continuous Total Dissipation, P
D
T
A
鈮?/div>
+25擄C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 680mW
Derate Above +65擄C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mW/擄C
T
A
= +70擄C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 640mW
Operating Ambient Temperature Range, T
A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0擄 to +70擄C
Storage Temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?5擄 to +150擄C
Lead Temperature (During Soldering, 1/16鈥?(1.6mm) from case for 10sec), T
L
. . . . . . . . . . . +260擄C
Note 1. All voltage values, except differential voltages, are with respect to the midpoint between
V
CC
+ and V
CC
鈥?
Note 2. Differential voltages are at the non鈥搃nverting input pin with respect to the inverting input pin.
Note 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage
or 15V, whchever is less.
Note 4. The output may be shorted to GND or to either supply. Temperature and/or supply voltages
must be limited to ensure that the dissipation rating is not exceeded.
1
2
3
