NTE65101
Integrated Circuit
256 x 4鈥揃it Static Random Access Memory (SRAM)
Description:
The NTE65101 is a CMOS 1024鈥揵it device organized in 256 words by 4 bits in a 22鈥揕ead DIP type
package. This device offers ultra low power and fully static operation with a single 5V supply. Sepa-
rate data inputs and data outputs permit maximum flexibility in bus鈥搊riented systems. Data retention
at a power supply as low as 2V over temperature readily allows design into applications using battery
backup for nonvolatility. The NTE65101 is fully static and does not require clocking in standby mode.
Features:
D
Organized as 256 Bytes of 4鈥揃its
D
Static Operation
D
Low Standby Power
D
Three鈥揝tate Output
D
Single 5V Power Supply
D
Data Retention to 2V
D
TTL Compatible
D
Maximum Access Time: 450ns
Absolute Maximum Ratings:
(Voltages referenced to V
SS
Pin8)
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?.5 to +7V
Input Voltage, V
in
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?.3 to V
CC
+0.3V
Operating Temperature Range, T
A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?0擄 to +85擄C
Storage Temperature Range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?5擄 to +150擄C
Note 1. This device contains circuitry to protect the inputs against damage due to high static voltages
or electric fields; however, it is advised that normal precautions be taken to avoid application
of any voltage higher than maximum rated voltages to this high impedance circuit.
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