NTE1475
Integrated Circuit
CMOS, Phase鈥揕ocked Loop (PLL) Frequency
Synthesizer for CB
Features:
D
Built鈥搃n high speed programmable divider for direct PLL system
D
PLL out鈥搊f鈥搇ock output available to inhibit transmittion.
D
Instantaneous call capability of channel 9 and 19.
D
Built鈥搃n detecting circuit of mis鈥損rogram
D
Built鈥搃n amplifier for crystal oscillator
D
Built鈥搃n amplifier for active low鈥損ass filter.
D
BCD code channel selection. (Pull鈥揹own resistors included)
Absolute Maximum Ratings:
(T
A
= +25擄C unless otherwie specified)
Maximum Supply Voltage, V
DD
max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?.3 to +8.0V
Maximum Input Voltage, V
IN
max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?.3 to V
DD
+0.3V
Maximum Output Voltage (MC, LM, A
OUT
, Output Off), V
OUT(1)
. . . . . . . . . . . . . . . . 鈥?.3 to +10.0V
Maximum Output Voltage (PD
OUT
, Output Off), V
OUT(2)
. . . . . . . . . . . . . . . . . . . . . 鈥?.3 to V
DD
+ 0.3V
Maximum Output Current (MC, LM), I
OUT (1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 15mA
Maximum Output Current (A
OUT
), I
OUT (2)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 2.5mA
Allowable Power Dissipation, P
D
max (T
A
= +70擄C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mW
Operating Temperature Range, T
opg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?0擄 to +70擄C
Storage Temperature Range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 鈥?0擄 to +125擄C
Allowable Operating Ranges:
(T
A
= +25擄C unless otherwise specified)
Parameter
Supply Voltage
Output Voltage
Input Amplitude
Symbol
V
DD
V
OUT
V
IN (1)
V
IN (2)
Input Frequency
f
IN (1)
f
IN (2)
Input 鈥淗鈥?Level Voltage
Input 鈥淟鈥?Level Voltage
V
IH
V
IL
Test Conditions
T
A
= 鈥?0擄 to +70擄C
MC, LM, A
OUT
, Output Off
X
IN
, f
IN (1)
= 10.25MH
Z
, Note 1
P
IN
, f
IN (2)
= 20MH
Z
, Note 1
X
IN
, V
IN (1)
= 1.0V
p鈥損
, Note 1
P
IN
, V
IN (2)
= 1.0V
p鈥損
, Note 1
D1 to D6, T/R, CH9, CH19
D1 to D6, T/R, CH9, CH19
Min
5.0
0
1.0
1.0
1.0
1.0
V
DD
鈥?.8
鈥?/div>
Typ
6.0
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Max
7.0
9.0
0.9V
DD
0.9V
DD
10.25
20
鈥?/div>
0.8
Unit
V
V
V
p鈥損
V
p鈥損
MH
Z
MH
Z
V
V
Note 1. Sinusoidal wave, capacitive coupling, T
A
= 鈥?0擄 to +70擄C
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