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NTD80N02 Datasheet

  • NTD80N02

  • Power MOSFET

  • 8頁

  • ONSEMI

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NTD80N02
Power MOSFET
24 V, 80 A, N鈭扖hannel DPAK
Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
Features
http://onsemi.com
V
(BR)DSS
24 V
R
DS(on)
TYP
5.0 mW
I
D
MAX
80 A
鈥?/div>
Pb鈭扚ree Packages are Available
Typical Applications
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Power Supplies
Converters
Power Motor Controls
Bridge Circuits
G
Unit
Vdc
Vdc
Adc
4
Watts
擄C
mJ
1 2
3
N鈭扖hannel
D
MAXIMUM RATINGS
(T
J
= 25擄C unless otherwise noted)
Rating
Drain鈭抰o鈭扴ource Voltage
Gate鈭抰o鈭扴ource Voltage 鈭?Continuous
Drain Current 鈭?Continuous @ T
C
= 25擄C
Drain Current
鈭?Single Pulse (t
p
= 10
ms)
Total Power Dissipation @ T
C
= 25擄C
Operating and Storage
Temperature Range
Single Pulse Drain鈭抰o鈭扴ource Avalanche
Energy 鈭?Starting T
J
= 25擄C
(V
DD
= 24 Vdc, V
GS
= 10 Vdc,
I
L
= 17 Apk, L = 5.0 mH, R
G
= 25
鈩?
Thermal Resistance
鈭?Junction鈭抰o鈭扖ase
鈭?Junction鈭抰o鈭扐mbient (Note 1)
鈭?Junction鈭抰o鈭扐mbient (Note 2)
Maximum Lead Temperature for Soldering
Purposes, 1/8鈥?from case for 10 seconds
Symbol
V
DSS
V
GS
I
D
I
DM
P
D
T
J
, T
stg
E
AS
Value
24
鹵20
80*
200
75
鈭?5 to
150
733
S
4
4
1 2
3
12
3
擄C/W
R
胃JC
R
胃JA
R
胃JA
T
L
1.65
67
120
260
擄C
CASE 369C
CASE 369D
CASE 369AA
DPAK
DPAK
DPAK
(Surface Mount) (Surface Mount) (Straight Lead)
STYLE 2
STYLE 2
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
YWW
80
N02
3
Source
1
Gate
2
Drain
3
Source
= Year
= Work Week
= Device Code
Publication Order Number:
NTD80N02/D
4
Drain
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR4 board using 1鈥?pad size,
(Cu Area 1.127 in
2
).
2. When surface mounted to an FR4 board using the minimum recommended
pad size, (Cu Area 0.412 in
2
).
*Chip current capability limited by package.
1
Gate
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
漏
Semiconductor Components Industries, LLC, 2004
1
December, 2004 鈭?Rev. 4
YWW
80
N02
2
Drain
Y
WW
80N02
ORDERING INFORMATION

NTD80N02 產(chǎn)品屬性

  • 75

  • 分離式半導(dǎo)體產(chǎn)品

  • FET - 單

  • -

  • MOSFET N 通道，金屬氧化物

  • 邏輯電平門

  • 24V

  • 80A

  • 5.8 毫歐 @ 80A，10V

  • 3V @ 250µA

  • 42nC @ 4.5V

  • 2600pF @ 20V

  • 75W

  • 表面貼裝

  • TO-252-3，DPak（2 引線+接片），SC-63

  • D-Pak

  • 管件

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