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NM93CS46 Datasheet

  • NM93CS46

  • (MICROWIRE⑩ Bus Interface) 1024-Bit Serial EEPROM with Data...

  • 16頁

  • FAIRCHILD

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NM93CS46 (MICROWIRE Bus Interface) 1024-Bit Serial EEPROM
with Data Protect and Sequential Read
February 2000
NM93CS46
(MICROWIRE鈩?Bus Interface) 1024-Bit Serial EEPROM
with Data Protect and Sequential Read
General Description
NM93CS46 is a 1024-bit CMOS non-volatile EEPROM organized
as 64 x 16-bit array. This device features MICROWIRE interface
which is a 4-wire serial bus with chipselect (CS), clock (SK), data
input (DI) and data output (DO) signals. This interface is compat-
ible to many of standard Microcontrollers and Microprocessors.
NM93CS46 offers programmable write protection to the memory
array using a special register called Protect Register. Selected
memory locations can be protected against write by programming
this Protect Register with the address of the first memory location
to be protected (all locations greater than or equal to this first
address are then protected from further change). Additionally, this
address can be 鈥減ermanently locked鈥?into the device, making all
future attempts to change data impossible. In addition this device
features 鈥渟equential read鈥? by which, entire memory can be read
in one cycle instead of multiple single byte read cycles. There are
10 instructions implemented on the NM93CS46, 5 of which are for
memory operations and the remaining 5 are for Protect Register
operations. This device is fabricated using Fairchild Semiconduc-
tor floating-gate CMOS process for high reliability, high endurance
and low power consumption.
鈥淟Z鈥?and 鈥淟鈥?versions of NM93CS46 offer very low standby current
making them suitable for low power applications. This device is offered
in both SO and TSSOP packages for small space considerations.
Features
I
Wide V
CC
2.7V - 5.5V
I
Programmable write protection
I
Sequential register read
I
Typical active current of 200碌A(chǔ)
10碌A(chǔ) standby current typical
1碌A(chǔ) standby current typical (L)
0.1碌A(chǔ) standby current typical (LZ)
I
No Erase instruction required before Write instruction
I
Self timed write cycle
I
Device status during programming cycles
I
40 year data retention
I
Endurance: 1,000,000 data changes
I
Packages available: 8-pin SO, 8-pin DIP, 8-pin TSSOP
Functional Diagram
CS
SK
DI
INSTRUCTION
REGISTER
V
CC
INSTRUCTION
DECODER
CONTROL LOGIC
AND CLOCK
GENERATORS
PRE
PE
ADDRESS
REGISTER
PROTECT
REGISTER
COMPARATOR
AND
WRITE ENABLE
HIGH VOLTAGE
GENERATOR
AND
PROGRAM
TIMER
DECODER
EEPROM ARRAY
16
READ/WRITE AMPS
16
V
SS
DATA IN/OUT REGISTER
16 BITS
DO
DATA OUT BUFFER
漏 1999 Fairchild Semiconductor Corporation
NM93CS46 Rev. F.2
1
www.fairchildsemi.com

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