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NL17SZ125DFT2G Datasheet

  • NL17SZ125DFT2G

  • Non-Inverting 3-State Buffer

  • 8頁(yè)

  • ONSEMI

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NL17SZ125
Non鈭捍nverting 3鈭扴tate Buffer
The NL17SZ125 is a high performance non鈭抜nverting buffer operating
from a 1.65 V to 5.5 V supply.
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Extremely High Speed: t
PD
2.6 ns (typical) at V
CC
= 5.0 V
Designed for 1.65 V to 5.5 V V
CC
Operation
Overvoltage Tolerant Inputs and Outputs
LVTTL Compatible
鈭?/div>
Interface Capability With 5.0 V TTL Logic
with V
CC
= 3.0 V
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
3鈭扴tate OE Input is Active鈭扡ow
Replacement for NC7SZ125
Chip Complexity = 36 FETs
Pb鈭扚ree Package is Available
http://onsemi.com
MARKING
DIAGRAM
5
5
1
SC鈭?8A (SOT鈭?53)
DF SUFFIX
CASE 419A
d = Date Code
1
M0
d
PIN ASSIGNMENT
1
2
OE
1
5
V
CC
3
4
5
IN A
2
OE
IN A
GND
OUT Y
V
CC
GND
3
4
OUT Y
OE Input
L
FUNCTION TABLE
A Input
L
H
X
Y Output
L
H
Z
Figure 1. Pinout
(Top View)
L
H
X = Don鈥檛 Care
OE
IN A
EN
OUT Y
Figure 2. Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
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Semiconductor Components Industries, LLC, 2005
January, 2005
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Rev. 4
1
Publication Order Number:
NL17SZ125/D

NL17SZ125DFT2G 產(chǎn)品屬性

  • 3,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器

  • 17SZ

  • 緩沖器/線路驅(qū)動(dòng)器，非反相

  • 1

  • 1

  • 32mA，32mA

  • 1.65 V ~ 5.5 V

  • -55°C ~ 125°C

  • 表面貼裝

  • 6-TSSOP（5 引線），SC-88A，SOT-353

  • SC-70

  • 帶卷 (TR)

  • NL17SZ125DFT2GOSNL17SZ125DFT2GOS-NDNL17SZ125DFT2GOSTR

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