Stresses beyond those listed may cause permanent damage to the device.
implied. Exposure to absolute maximum rated conditions for extended peri-
ods may affect device reliability.
RDS(on) = 50 m鈩?/div>
Drain
Gate
Sense
Main FET
Source
Sense
Source
Main
MARKING DIAGRAM
Source 1
Gate 1
Source 2
Gate 2
1
2
3
4
(Top View)
TBD
= Specific Device Code
TBD
8
7
6
5
Mirror 1
Drain 1
Mirror 2
Drain 2
MAIN MOSFET MAXIMUM RATINGS
(TJ = 25擄C unless otherwise noted)
Rating
Drain鈥搕o鈥揝ource Voltage
Drain鈥搕o鈥揋ate Voltage
(RGS = 1.0 MW)
Gate鈥搕o鈥揝ource Voltage
Single Pulse Drain鈥搕o鈥揝ource
Avalanche Energy (Note 1.)
(VDD = 25 Vdc, VGS = 10 Vdc,
VDS = 20 Vdc, IL = 15 Apk,
L = 10 mH, RG = 25
鈩?
Drain Current
鈥?Continuous @ TA = 25擄C
鈥?Continuous @ TA = 100擄C (Note 1.)
鈥?Single Pulse (tp
v10
碌s)
Symbol
VDSS
VDGR
VGS
EAS
Value
30
30
"16
250
Unit
Vdc
Vdc
Vdc
mJ
ORDERING INFORMATION
Device
NIMD6302R2
Package
SOIC鈥?
Shipping
TBD
ID
6.5
Adc
ID
4.4
Adc
IDM
33
Apk
Maximum Power Dissipation (TA = 25擄C)
PD
TBD
W
1. Switching characteristics are independent of operating junction temperatures
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
漏
Semiconductor Components Industries, LLC, 2001
1
February, 2001 鈥?Rev. 1
Publication Order Number:
NIMD6302R2/D