=10V.
鈩?/div>
@ V
GS
=-10V.
High density cell design or extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
Matched pair for equal input capacitance and power capability
.
________________________________________________________________________________
V+
P-Gate
Vout
Vout
Vout
N -Gate
Vout
V-
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
Maximum Power Dissipation
(Single Device)
T
J
,T
STG
T
A
= 25擄C unless otherwise noted
N-Channel
30
20
(Note 1a & 2)
P-Channel
-30
-20
-3.4
-10
2.5
1.2
1
-55 to 150
Units
V
V
A
4.3
15
(Note 1a)
(Note 1b)
(Note 1c)
W
Operating and Storage Temperature Range
擄C
THERMAL CHARACTERISTICS
R
胃
JA
R
胃
JC
Thermal Resistance, Junction-to-Ambient
(Single Device)
Thermal Resistance, Junction-to-Case
(Single Device)
50
(Note 1a)
擄C/W
擄C/W
25
(Note 1)
漏 1997 Fairchild Semiconductor Corporation
NDS8852H Rev. C1