April 1995
NDS0605
P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process has
been designed to minimize on-state resistance, provide rugged
and reliable performance and fast switching. They can be
used, with a minimum of effort, in most applications requiring
up to 0.18A DC and can deliver pulsed currents up to 1A. This
product is particularly suited to low voltage applications
requiring a low current high side switch.
Features
-0.18A, -60V. R
DS(ON)
= 5
鈩?/div>
@ V
GS
= -10V.
Voltage controlled p-channel small signal switch.
High density cell design for low R
DS(ON)
.
High saturation current
.
___________________________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol Parameter
V
DSS
V
DGR
V
GSS
I
D
P
D
Drain-Source Voltage
Drain-Gate Voltage (R
GS
< 1 M
鈩?/div>
)
Gate-Source Voltage - Continuous
Drain Current - Continuous
- Pulsed
Maximum Power Dissipation
T
A
= 25擄C unless otherwise noted
NDS0605
-60
-60
鹵20
-0.18
-1
T
A
= 25擄C
0.36
2.9
-55 to 150
300
Units
V
V
V
A
W
mW/
o
C
擄C
擄C
Derate above 25擄C
T
J
,T
STG
T
L
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/16" from case for 10 seconds
THERMAL CHARACTERISTICS
R
胃
JA
Thermal Resistance, Junction-to-Ambient
350
擄C/W
漏 1997 Fairchild Semiconductor Corporation
NDS0605.SAM
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