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NDP4050 Datasheet

  • NDP4050

  • N-Channel Enhancement Mode Field Effect Transistor

  • 69.67KB

  • 6頁

  • FAIRCHILD

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July 1996
NDP4050 / NDB4050
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process has been especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand high energy pulses in the
avalanche and commutation modes. These devices are
particularly suited for low voltage applications such as
automotive, DC/DC converters, PWM motor controls, and
other battery powered circuits where fast switching, low
in-line power loss, and resistance to transients are
needed.
Features
15A, 50V. R
DS(ON)
= 0.10
鈩?/div>
@ V
GS
=10V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175擄C maximum junction temperature rating.
High density cell design for extremely low R
DS(ON)
.
TO-220 and TO-263 (D
2
PAK) package for both through hole
and surface mount applications.
____________________________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol
V
DSS
V
DGR
V
GSS
I
D
Parameter
Drain-Source Voltage
Drain-Gate Voltage (R
GS
< 1 M
鈩?/div>
)
T
C
= 25擄C unless otherwise noted
NDP4050
50
50
鹵 20
鹵 40
鹵 15
鹵 45
50
0.33
-65 to 175
275
NDB4050
Units
V
V
V
Gate-Source Voltage - Continuous
- Nonrepetitive (t
P
< 50 碌s)
Drain Current - Continuous
- Pulsed
A
P
D
T
J
,T
STG
T
L
Total Power Dissipation
Derate above 25擄C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
W
W/擄C
擄C
擄C
漏 1997 Fairchild Semiconductor Corporation
NDP4050 Rev. B

NDP4050 產(chǎn)品屬性

  • Fairchild Semiconductor

  • N-Channel

  • 50 V

  • +/- 20 V

  • 15 A

  • 0.1 Ohms

  • Single

  • + 175 C

  • Through Hole

  • TO-220

  • 37 ns

  • - 65 C

  • 50 W

  • 70 ns

  • 18 ns

NDP4050相關(guān)型號PDF文件下載

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  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD ...
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD ...
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD ...
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD ...
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD ...
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD ...
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD ...
  • 英文版
    N-Channel Logic Level Enhancement Mode Field Effect Transist...
    FAIRCHILD
  • 英文版
    N-Channel Logic Level Enhancement Mode Field Effect Transist...
    FAIRCHILD ...
  • 英文版
    N-Channel Logic Level Enhancement Mode Field Effect Transist...
    FAIRCHILD
  • 英文版
    N-Channel Logic Level Enhancement Mode Field Effect Transist...
    FAIRCHILD ...
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD
  • 英文版
    N-Channel Enhancement Mode Field Effect Transistor
    FAIRCHILD ...

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