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NDC7003P Datasheet

  • NDC7003P

  • Dual P-Channel Enhancement Mode Field Effect Transistor

  • 260.03KB

  • 10頁

  • FAIRCHILD

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March 1996
NDC7003P
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
These dual P-Channel enhancement mode power field
effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process has been designed to minimize
on-state resistance, provide rugged and reliable
performance and fast switching. This product is
particularly suited to low voltage applications requiring a
low current high side switch.
Features
-0.34A, -50V. R
DS(ON)
= 5
鈩?/div>
@ V
GS
=-10V.
High density cell design for low R
DS(ON)
.
Proprietary SuperSOT
TM
-6 package design using copper
lead frame for superior thermal and electrical capabilities.
High saturation current.
____________________________________________________________________________________________
4
3
5
2
6
SOT-6 (SuperSOT
TM
-6)
1
Absolute Maximum Ratings
T
A
= 25擄C unless otherwise noted
Symbol
V
DSS
V
GSS
I
D
Parameter
Drain-Source Voltage
Gate-Source Voltage - Continuous
Drain Current - Continuous
- Pulsed
P
D
Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1a)
NDC7003P
-50
-20
-0.34
-1
0.96
0.9
0.7
-55 to 150
Units
V
V
A
W
T
J
,T
STG
Operating and Storage Temperature Range
擄C
THERMAL CHARACTERISTICS
R
胃
JA
R
胃
JC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
130
60
擄C/W
擄C/W
漏 1997 Fairchild Semiconductor Corporation

NDC7003P 產(chǎn)品屬性

  • High Voltage Switches for Power ProcessingSMPS Power Switch

  • 3,000

  • 分離式半導體產(chǎn)品

  • FET - 陣列

  • PowerTrench®

  • 2 個 P 溝道（雙）

  • 邏輯電平門

  • 60V

  • 340mA

  • 5 歐姆 @ 340mA，10V

  • 3.5V @ 250µA

  • 2.2nC @ 10V

  • 66pF @ 25V

  • 700mW

  • 表面貼裝

  • SOT-23-6 細型，TSOT-23-6

  • 6-SSOT

  • 帶卷 (TR)

  • NDC7003PTR

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