Figure 1. 22 Second Solid State Time Delay Relay Circuit
鈭?/div>
Flip
R Flop
7
+
0.01
mF
Threshold
2.0 k
V
S
Trigger
Test circuit for measuring DC parameters (to set output and
measure parameters):
a) When V
S
w
2/3 V
CC
, V
O
is low.
b) When V
S
v
1/3 V
CC
, V
O
is high.
c) When V
O
is low, Pin 7 sinks current. To test for Reset, set V
O
c)
high, apply Reset voltage, and test for current flowing into Pin 7.
c)
When Reset is not in use, it should be tied to V
CC
.
Figure 2. Representative Block Diagram
漏
Semiconductor Components Industries, LLC, 2004
Figure 3. General Test Circuit
1
March, 2004 鈭?Rev. 8
Publication Order Number:
MC1455/D