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NBSG14

2.5V/3.3V SiGe Differential

1:4 Clock/Data Driver with

RSECL* Outputs

*Reduced Swing ECL

http://onsemi.com

The NBSG14 is a 1鈭抰o鈭? clock/data distribution chip, optimized for

ultra鈭抣ow skew and jitter.

Inputs incorporate internal 50

W

termination resistors and accept

NECL (Negative ECL), PECL (Positive ECL), LVTTL, LVCMOS,

CML, or LVDS. Outputs are RSECL (Reduced Swing ECL),

400 mV.

MARKING

DIAGRAM*

SG

14

LYW

鈥?/div>

Maximum Input Clock Frequency up to 12 GHz Typical

Maximum Input Data Rate up to 12 Gb/s Typical

30 ps Typical Rise and Fall Times

125 ps Typical Propagation Delay

FCBGA鈭?6

BA SUFFIX

CASE 489

RSPECL Output with Operating Range: V

CC

= 2.375 V to 3.465 V

with V

EE

= 0 V

鈥?/div>

RSNECL Output with RSNECL or NECL Inputs with

Operating Range: V

CC

= 0 V with V

EE

= 鈭?.375 V to 鈭?.465 V

鈥?/div>

RSECL Output Level (400 mV Peak鈭抰o鈭扨eak Output),

Differential Output

鈥?/div>

50

W

Internal Input Termination Resistors

QFN鈭?6

MN SUFFIX

CASE 485G

SG14

ALYW

鈥?/div>

Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices

A = Assembly Location

L = Wafer Lot

Y = Year

W = Work Week

*For further details, refer to Application Note

AND8002/D

ORDERING INFORMATION

Device

NBSG14BA

NBSG14BAR2

Package

4x4 mm

FCBGA鈭?6

4x4 mm

FCBGA鈭?6

3x3 mm

QFN鈭?6

3x3 mm

QFN鈭?6

Shipping

100 Units/Tray

500 / Tape & Reel

NBSG14MN

123 Units / Rail

NBSG14MNR2

3000 / Tape & Reel

Board

NBSG14BAEVB

Description

NBSG14BA Evaluation Board

漏

Semiconductor Components Industries, LLC, 2003

1

August, 2003 鈭?Rev. 7

Publication Order Number:

NBSG14/D

標準包裝
100
類別
集成電路 (IC)
家庭
時鐘/計時 - 時鐘緩沖器，驅(qū)動器
系列
-
類型
扇出緩沖器（分配），數(shù)據(jù)
電路數(shù)
1
比率 - 輸入:輸出
1:4
差分 - 輸入:輸出
是/是
輸入
CML，LVCMOS，LVDS，LVTTL，NECL，PECL，RSECL
輸出
RSECL，RSNECL，RSPECL
頻率 - 最大
12GHz
電源電壓
2.375 V ~ 3.465 V
工作溫度
-40°C ~ 70°C
安裝類型
表面貼裝
封裝/外殼
16-LBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝
16-FCBGA（4x4）
包裝
帶卷 (TR)

NBSG14BAHTBG相關(guān)型號PDF文件下載

型號

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描述

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NBSG14BAHTBG Datasheet

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