NBSG111
2.5V/3.3V SiGe Differential
1:10 Clock/Data Driver
with RSECL* Outputs
*Reduced Swing ECL
http://onsemi.com
The NBSG111 is a 1-to-10 differential clock/data driver. The
device is functionally equivalent to the LVEP111 device with much
higher bandwidth and lower EMI capabilities.
Inputs incorporate internal 50
W
termination resistors (input to VT
pad) and accept NECL (Negative ECL), PECL (Positive ECL),
LVTTL, LVCMOS, CML, or LVDS. Outputs are RSECL (Reduced
Swing ECL), 400 mV.
The Q[0:9] / Q[0:9] outputs have a differential synchronous enable
(EN/EN) pin. The synchronous enable pin is used to avoid a runt clock
pulse when the device is enabled/disabled as can happen with an
asynchronous control. The internal flip flop is clocked on the falling
edge of selected clock (CLK0/CLK0 or CLK1/CLK1), therefore all
associated specification limits are referenced to the negative edge of
the selected clock input.
The V
BB
and V
MM
pins are internally generated voltage supplies
available to this device only. The V
BB
is used for single-ended NECL
or PECL inputs and the V
MM
pin is used for LVCMOS inputs. For
single- ended input operation, the unused differential input is
connected to V
BB
or V
MM
as a switching reference voltage. V
BB
or
V
MM
may also rebias AC coupled inputs. When used, decouple V
BB
and V
MM
via a 0.01
mF
capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
and V
MM
outputs should be left open.
MARKING
DIAGRAM*
SG
111
LYW
FCBGA-49
BA SUFFIX
CASE 489A
SG111
L
Y
W
= Device Code
= Wafer Lot
= Year
= Work Week
*For further details, refer to Application Note
AND8002/D
ORDERING INFORMATION
Device
NBSG111BA
NBSG111BAR2
Package
8x8 mm
FCBGA-49
8x8 mm
FCBGA-49
Shipping
100 Units/Tray
500/Tape & Reel
鈥?/div>
Maximum Input Clock Frequency > 6 GHz Typical
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Maximum Input Data Rate > 6 Gb/s Typical
300 ps Typical Propagation Delay
60 ps Typical Rise and Fall Times
RSPECL Output with Operating Range: V
CC
= 2.375 V to
3.465 V with V
EE
= 0 V
鈥?/div>
RSNECL Output with RSNECL or NECL Inputs with
Operating Range: V
CC
= 0 V with V
EE
= -2.375 V to -3.465 V
鈥?/div>
RSECL Output Level (400 mV Peak-to-Peak Output), Differential
Output
鈥?/div>
50
W
Internal Input Termination Resistors
Board
NBSG111BAEVB
Description
NBSG111BA Evaluation Board
鈥?/div>
Compatible with Existing 2.5 V/3.3 V LVEP and EP Devices
鈥?/div>
V
BB
and V
MM
Reference Voltage Output
漏
Semiconductor Components Industries, LLC, 2003
1
May, 2003 - Rev. 7
Publication Order Number:
NBSG111/D
NBSG111/D相關(guān)型號PDF文件下載
-
型號
版本
描述
廠商
下載
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2.5V/3.3VSiGe Differential 2 X 2 Crosspoint Switch with Out...
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2.5V/3.3VSiGe Differential 2 X 2 Crosspoint Switch with Out...
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英文版
Evaluation Board Manual
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Evaluation Board Manual
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2.5V/3.3V SiGe 1:2 Differential Clock Driver with RSECL Outp...
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英文版
2.5V/3.3VSiGe 1:2 Differential Clock Driver with RSECL* Out...
ONSEMI
-
英文版
2.5V/3.3VSiGe 1:2 Differential Clock Driver with RSECL* Out...
ONSEMI [ON...
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英文版
2.5V/3.3V SiGe 1:2 Differential Clock Driver with RSECL Outp...
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