NB4N855S
3.3 V, 1.5 Gb/s Dual
AnyLevel鈩?to LVDS
Receiver/Driver/Buffer/
Translator
Description
NB4N855S is a clock or data Receiver/Driver/Buffer/Translator
capable of translating AnyLevel input signal (LVPECL, CML, HSTL,
LVDS, or LVTTL/LVCMOS) to LVDS. Depending on the distance,
noise immunity of the system design, and transmission line media, this
device will receive, drive or translate data or clock signals up to
1.5 Gb/s or 1.0 GHz, respectively. This device is pin鈭抐or鈭抪in plug in
compatible to the SY55855V in a 3.3 V applications.
The NB4N855S has a wide input common mode range of
GND + 50 mV to V
CC
鈭?/div>
50 mV. This feature is ideal for translating
differential or single鈭抏nded data or clock signals to 350 mV typical
LVDS output levels.
The device is offered in a small 10 lead MSOP package. NB4N855S
is targeted for data, wireless and telecom applications as well as high
speed logic interface where jitter and package size are main
requirements.
Application notes, models, and support documentation are available
at www.onsemi.com.
Features
http://onsemi.com
MARKING
DIAGRAM*
10
1
Micro鈭?0
M SUFFIX
CASE 846B
A
Y
W
G
855S
AYWG
G
1
= Assembly Location
= Year
= Work Week
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Guaranteed Input Clock Frequency up to 1.0 GHz
Guaranteed Input Data Rate up to 1.5 Gb/s
490 ps Maximum Propagation Delay
1.0 ps Maximum RMS Jitter
180 ps Maximum Rise/Fall Times
Single Power Supply; V
CC
= 3.3 V
鹵10%
Temperature Compensated TIA/EIA鈭?44 Compliant LVDS Outputs
GND + 50 mV to V
CC
鈭?/div>
50 mV V
CMR
Range
Pb鈭扚ree Package is Available
D0
D0
Q0
Q0
D1
D1
Q1
Q1
Functional Block Diagram
VOLTAGE (50 mV/div)
ORDERING INFORMATION
Device DDJ = 7 ps
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
TIME (133 ps/div)
Figure 1. Typical Output Waveform at 1.5 Gb/s with K28.5
(V
INPP
= 100 mV, Input Signal DDJ = 24 ps)
漏
Semiconductor Components Industries, LLC, 2006
April, 2006
鈭?/div>
Rev. 2
1
Publication Order Number:
NB4N855S/D
NB4N855S_06相關(guān)型號PDF文件下載
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型號
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描述
廠商
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