鈥?/div>
27 MHz Crystal Reference
Serial Load Capability for Proprietary Frequencies
Flexible Input Allows for External Clock Reference
Exceeds Bellcore and ITU Jitter Generation Specification
PLL Lock Detect Output
Output Enable
Fully Integrated Phase鈭扡ock鈭扡oop with Internal Loop Filter
Operating Range: V
CC
= 3.135 V to 3.465 V
Small Footprint 24 Pin QFN
These are Pb鈭扚ree Devices*
LOCKED
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
27 MHz
XTAL
OSC
B
R
FB
Feedback
Divider
OUTDIV
B2,
4, 8,
16, 32
CLKOUT
CLKOUT
OE
V
CC
鈭?/div>
2 V
SDATA
SCLOCK
SLOAD
Frequency Control Logic
Serial Load
Figure 1. Simplified Block Diagram
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2006
June, 2006
鈭?/div>
Rev. 0
1
Publication Order Number:
NB4N441/D
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