NB4N316M
3.3 V AnyLevelt Receiver
to CML Driver/Translator
with Input Hysteresis
2.0 GHz Clock / 2.5 Gb/s Data
The NB4N316M is a differential Clock or Data receiver and will
accept AnyLevelt input signals: LVPECL, CML, LVCMOS,
LVTTL, or LVDS. These signals will be translated to CML, operating
up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB4N316M is
ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or
Data distribution applications. The CML outputs are 16 mA open
collector (see Figure 18) which requires resistor (R
L
) load path to V
TT
termination voltage (see Figure 19). The open collector CML outputs
must be terminated to V
TT
at power up. The differential outputs
produce Current鈥揗ode Logic (CML) compatible levels when the
receiver is loaded with 50
W
or 25
W
loads connected to 1.8 V, 2.5 V
or 3.3 V supplies. This simplifies device interface by eliminating a
need for coupling capacitors.
The NB4N316M features an input threshold hysteresis of
approximately 25 mV, providing increased noise immunity and stability.
The device is offered in a small 8鈭抪in TSSOP package (MSOP鈭?
compatible). Application notes, models, and support documentation
are available at www.onsemi.com.
Features
http://onsemi.com
MARKING
DIAGRAM*
8
1
TSSOP鈭?
DT SUFFIX
CASE 948R
A
L
Y
W
G
8
E316
ALYWG
G
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Maximum Input Clock Frequency > 2.0 GHz
Maximum Input Data Rate > 2.5 Gb/s
Typically 1 ps of RMS Clock Jitter
Typically 10 ps of Data Dependent Jitter
550 ps Typical Propagation Delay
150 ps Typical Rise and Fall Times
Differential CML Outputs
25 mV of Receiver Input Threshold Hysteresis
Operating Range: V
CC
= 3.0 V to 3.6 V with V
EE
= 0 V and
V
TT
= 1.8 V to 3.6 V
鈥?/div>
Functionally Compatible with Existing 2.5 V / 3.3 V LVEL,
LVEP, EP, and SG Devices
鈥?/div>
鈭?0擄C
to +85擄C Ambient Operating Temperature
鈥?/div>
These are Pb鈭扚ree Devices*
D
D
Q
Q
Figure 1. Functional Block Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2006
November, 2006
鈭?/div>
Rev. 3
1
Publication Order Number:
NB4N316M/D
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