NB100LVEP221
2.5V/3.3V 1:20 Differential
HSTL/ECL/PECL Clock Driver
The NB100LVEP221 is a low skew 1-to-20 differential clock
driver, designed with clock distribution in mind, accepting two clock
sources into an input multiplexer. The two clock inputs are differential
ECL/PECL; CLK1/CLK1 can also receive HSTL signal levels. The
LVPECL input signals can be either differential configuration or
single-ended (if the V
BB
output is used).
The LVEP221 specifically guarantees low output-to-output skew.
Optimal design, layout, and processing minimize skew within a device
and from device to device.
To ensure tightest skew, both sides of differential outputs should be
terminated identically into 50
W
even if only one output is being used.
If an output pair is unused, both outputs may be left open
(unterminated) without affecting skew.
The NB100LVEP221, as with most other ECL devices, can be
operated from a positive V
CC
supply in LVPECL mode. This allows the
LVEP221 to be used for high performance clock distribution in +3.3 V or
+2.5 V systems. In a PECL environment, series or Thevenin line
terminations are typically used as they require no additional power
supplies. For more information on PECL terminations, designers should
refer to Application Note AND8020/D.
The V
BB
pin, an internally generated voltage supply, is available to this
device only. For single- ended LVPECL input conditions, the unused
differential input is connected to V
BB
as a switching reference voltage.
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and
V
CC
via a 0.01
mF
capacitor and limit current sourcing or sinking to
0.5 mA. When not used, V
BB
should be left open.
Single- ended CLK input operation is limited to a V
CC
鈮?/div>
3.0 V in
LVPECL mode, or V
EE
鈮?/div>
-3.0 V in NECL mode.
http://onsemi.com
MARKING
DIAGRAM*
NB100
LVEP221
AWLYYWW
52-LEAD LQFP
THERMALLY ENHANCED
CASE 848H
FA SUFFIX
A
WL
YY
WW
52
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
*For additional information, refer to Application Note
AND8002/D
ORDERING INFORMATION
Device
NB100LVEP221FA
NB100LVEP221FAR2
Package
LQFP-52
Shipping
160 Units/Tray
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
15 ps Typical Output-to-Output Skew
40 ps Typical Device-to- Device Skew
Jitter Less than 2 ps RMS
Maximum Frequency > 1.0 GHz Typical
Thermally Enhanced 52-Lead LQFP
V
BB
Output
540 ps Typical Propagation Delay
LVPECL and HSTL Mode Operating Range:
V
CC
= 2.375 V to 3.8 V with V
EE
= 0 V
鈥?/div>
NECL Mode Operating Range:
V
CC
= 0 V with V
EE
= -2.375 V to -3.8 V
鈥?/div>
Q Output will Default Low with Inputs Open or at V
EE
鈥?/div>
Pin Compatible with Motorola MC100EP221
LQFP-52 1500/Tape & Reel
漏
Semiconductor Components Industries, LLC, 2003
1
January, 2003 - Rev. 4
Publication Order Number:
NB100LVEP221/D
NB100LVEP221FA 產(chǎn)品屬性
ON Semiconductor
時(shí)鐘驅(qū)動(dòng)器及分配
ECL, PECL
+/- 3.8 V
+/- 2.375 V
+ 85 C
LQFP-52 Exposed Pad
Tray
- 40 C
SMD/SMT
2:1
2
160
ECL, HSTL, PECL
NB100LVEP221FA相關(guān)型號(hào)PDF文件下載
-
型號(hào)
版本
描述
廠商
下載
-
英文版
CHIP LED DEVICE
SEOUL [Seoul Se...
-
英文版
CHIP LED DEVICE
SEOUL [Seoul Se...
-
英文版
BAG NOTEBOOK NYLON TOP-LOAD
-
英文版
BAG NOTEBOOK NYLON TOP-LOAD
-
英文版
BAG NOTEBOOK NYLON TOP-LOAD
-
英文版
BAG NOTEBOOK LEATHER TOP-LOAD
-
英文版
BAG NOTEBOOK LEATHER TOP-LOAD
-
英文版
BAG NOTEBOOK LEATHER TOP-LOAD
-
英文版
BAG NOTEBOOK NYLON W/WHEELS
-
英文版
BAG BACKPACK NYLON TOP-LOAD
-
英文版
BAG BACKPACK NYLON TOP-LOAD
-
英文版
3.3V1:22 Differential HSTL/PECL to HSTL Clock Driver with L...
ONSEMI
-
英文版
3.3V 1:22 Differential HSTL/PECL to HSTL Clock Driver with L...
-
英文版
3.3V Dual Differential LVPECL/LVDS to LVTTL Translator
ONSEMI
-
英文版
3.3V Dual Differential LVPECL/LVDS to LVTTL Translator
ONSEMI [ON...
-
英文版
2.5V / 3.3V Quad Differential Driver/Receiver
ONSEMI
-
英文版
2.5V / 3.3V ECL Quad Differential Driver/Receiver
-
英文版
2.5V / 3.3V / 5VECL Dual Differential 2:1 Multiplexer
ONSEMI
-
英文版
2.5V / 3.3V / 5VECL Dual Differential 2:1 Multiplexer
ONSEMI [ON...
-
英文版
2.5V / 3.3V Any Level Positive Input to -2.5V -3.3V / -5V NE...
ONSEMI
1
2
3
4
5
6
7
8
9
10
