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MX98715BEC Datasheet

  • MX98715BEC

  • APPLICATION NOTE

  • 163.14KB

  • 16頁(yè)

  • MCNIX

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PRELIMINARY
MX98715BEC
APPLICATION NOTE
1. INTRODUCTION
The purpose of this application note is to describe the
implementation of a PCI bus master 100 Base-TX Fast
Ethernet node using MXIC鈥?highly integrated single chip
Fast Ethernet NIC controller MX98715BEC. In details,
this document presents product overview, programming
guide, hardware design and layout recommendations that
can help you to quickly and smoothly implement a Fast
Ethernet adapter card.
As you can find in the MX98715BEC driver diskette,
MXIC already provideds a complete set of high quality
drivers for easier and more efficient way to interface with
MX98715BEC on the most popular Network Operating
Systems. Nevertheless, there are still some special ap-
plications or environment not covered in the
MX98715BEC driver diskette. Driver developers, how-
ever, could still refer to the section of driver program-
ming guide to accomplish the required driver. It is rec-
ommended that you should be familiar with the
MX98715BEC data sheet before reading this guide.
The MX98715BEC highly integrates with direct PCI bus
interface, including PCI bus master with DMA channel
capability, direct EEPROM as well as Boot ROM inter-
face, and large on chip transmit/receive FIFOs. Also,
the MX98715BEC is equipped with intelligent
IEEE802.3u-compliant Nway auto-negotiation capability
allowing a single RJ-45 connector to link with the other
IEEE802.3u-compliant device without re-configuration.
To optimize operating bandwidth, network data integrity
and throughput, the proprietary Adaptive Network
Throughput Control (ANTC) function is implemented. For
detailed product specification information, please refer
to the MX98715BEC data sheet.
3. HARDWARE DESIGN CONSIDERATIONS
3.1 SYSTEM APPLICATION BLOCK DIAGRAM
A system block diagram for the MX98715BEC based
Fast Ethernet adapter card is shown as following:
2. PRODUCT OVERVIEW
The MX98715BEC implements the 10/100Mbps MAC
layer and Physical layer on a single chip in accordance
with the IEEE 802.3 standard.
PCI Bus
Boot ROM
Osc or Crystal
25MHz
MX98715BEC
LED
EEPROM
Magnetic
RJ45
Fig. 1
P/N:PM0706
REV. 0.2, NOV. 30, 2000
1

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