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MUN5311DW1T1/D Datasheet

  • MUN5311DW1T1/D

  • Dual Bias Resistor Transistor

  • 186.35KB

  • 16頁

  • ETC

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MUN5311DW1T1 Series
Preferred Devices
Dual Bias Resistor
Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base鈥揺mitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the MUN5311DW1T1 series,
two complementary BRT devices are housed in the SOT鈥?63 package
which is ideal for low power surface mount applications where board
space is at a premium.
(3)
R
1
Q
1
Q
2
R
2
(4)
R
1
(5)
(6)
http://onsemi.com
(2)
R
2
(1)
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Available in 8 mm, 7 inch/3000 Unit Tape and Reel
6
5
4
1
2
3
MAXIMUM RATINGS
(T
A
= 25擄C unless otherwise noted, common for Q
1
and Q
2
, 鈥?minus sign for Q
1
(PNP) omitted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
SOT鈥?63
CASE 419B
STYLE 1
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Total Device Dissipation
T
A
= 25擄C
Derate above 25擄C
Thermal Resistance 鈥?/div>
Junction-to-Ambient
Characteristic
(Both Junctions Heated)
Total Device Dissipation
T
A
= 25擄C
Derate above 25擄C
Thermal Resistance 鈥?/div>
Junction-to-Ambient
Thermal Resistance 鈥?/div>
Junction-to-Lead
Junction and Storage Temperature
1. FR鈥? @ Minimum Pad
2. FR鈥? @ 1.0 x 1.0 inch Pad
xx
Symbol
P
D
Max
187 (Note 1.)
256 (Note 2.)
1.5 (Note 1.)
2.0 (Note 2.)
670 (Note 1.)
490 (Note 2.)
Max
250 (Note 1.)
385 (Note 2.)
2.0 (Note 1.)
3.0 (Note 2.)
493 (Note 1.)
325 (Note 2.)
188 (Note 1.)
208 (Note 2.)
鈥?5 to +150
Unit
mW
mW/擄C
擄C/W
xx
= Device Marking
=
(See Page 2)
R
胃JA
Symbol
P
D
Unit
mW
mW/擄C
擄C/W
擄C/W
擄C
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
R
胃JA
R
胃JL
T
J
, T
stg
Preferred
devices are recommended choices for future use
and best overall value.
漏
Semiconductor Components Industries, LLC, 2001
1
January, 2001 鈥?Rev. 6
Publication Order Number:
MUN5311DW1T1/D

MUN5311DW1T1/D相關(guān)型號PDF文件下載

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  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI
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    Dual Bias Resistor Transistors
    ONSEMI [ON...
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI [ON...
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI [ON...
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI [ON...
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI [ON...
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI [ON...
  • 英文版
    Dual Bias Resistor Transistors
    LRC
  • 英文版
    Dual Bias Resistor Trasnsistors
    MOTOROLA
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI [ON...
  • 英文版
    Dual Bias Resistor Transistors
    LRC [Lesha...
  • 英文版
    Dual Bias Resistor Trasnsistors
    MOTOROLA [...
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI
  • 英文版
    Dual Bias Resistor Transistors
    ONSEMI [ON...

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