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MTV412MS128 Datasheet

  • MTV412MS128

  • 8051 Embedded Monitor Controller 128K Flash Type with ISP

  • 253.97KB

  • 26頁(yè)

  • ETC

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MYSON-CENTURY
TECHNOLOGY
MTV412M
(Rev 0.9)
8051 Embedded Monitor Controller
128K Flash Type with ISP
FEATURES
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8051 core, 12MHz operating frequency with double CPU clock option
0.35um process; 3.3V/5V power supply; 5V I/O tolerant
1024-byte RAM; 128K-byte program Flash-ROM support In System Programming (ISP) without boot code
Maximum 14 channels of PWM DAC
Maximum 38 (44-pin) or 36 (42-pin) I/O pins
SYNC processor for composite separation/insertion, H/V polarity/frequency check and polarity adjustment
Clock output to drive other devices
Built-in low power reset circuit
Compliant with VESA DDC1/2B/2Bi/2B+ standard
Triple slave IIC addresses; two H/W auto transfer DDC1/DDC2x data for both D-sub and DVI interfaces
Single master IIC interface for internal device communication
Maximum 4-channel 8-bit A/D converter
Flash-ROM program code protection selection
42-pin SDIP or 44-pin PLCC/PQFP package
GENERAL DESCRIPTIONS
The MTV412M micro-controller is an 8051 CPU core embedded device targeted for LCD Monitor, LCD TV or
smart panel applications. It includes an 8051 CPU core, 1024-byte SRAM, on-chip 16K-bit EEPROM, 14
PWM DACs, VESA DDC for both D-sub and DVI interfaces, 4-channel 8-bit ADC, hardware ISP without boot
code and a 128K-byte internal program Flash-ROM in 42-pin SDIP, 44-pin PLCC/PQFP package.
P1.0-7
P3.0-2
P3.4
P0.0-7
P2.0-3
RD
WR
ALE
INT1
P0.0-7
P2.0-3
RD
WR
ALE
INT1
XFR
AUXRAM &
DDCRAM1 &
DDCRAM2
8051
CORE
RST
X1
X2
CKO
ADC
AD0-3
H/VSYNC
CONTROL
HSYNC
VSYNC
HBLANK
VBLANK
HCLAMP
VCOAST
ISCL
ISDA
HSCL1
HSDA1
HSCL2
HSDA2
PWM DAC
P7.0-7
P6.0-7
P5.0-6
P4.0-2
DA0-13
AUX
I/O
16K-BIT
EEPROM
DDC & IIC
INTERFACE
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without
notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
Revision 0.9
-1-
April 2002

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