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8051 core, 12MHz operating frequency with double CPU clock option.
0.35uM process; 5V/3.3V power supply and I/O; 3.3V core operating.
1024-byte RAM; 64K-byte program Flash-ROM support In System Programming (ISP).
Maximum 14 channels of PWM DAC.
Maximum 31 I/O pins.
SYNC processor for composite separation/insertion, H/V polarity/frequency check and polarity adjustment.
Built-in low power reset circuit.
Built-in self-test pattern generator with four free-running timings.
Compliant with VESA DDC1/2B/2Bi/2B+ standard.
Dual slave IIC addresses; H/W auto transfer DDC1/DDC2x data.
Single master IIC interface for internal device communication.
Maximum 4-channel 6-bit ADC.
Watchdog timer with programmable interval.
40-pin DIP, 42-pin SDIP or 44-pin PLCC package.
GENERAL DESCRIPTIONS
The MTV312M micro-controller is an 8051 CPU core embedded device especially tailored to CRT/LCD
Monitor applications. It includes an 8051 CPU core, 1024-byte SRAM, 14 built-in PWM DACs, VESA DDC
interface, 4-channel A/D converter, and a 64K-byte internal program Flash-ROM.
BLOCK DIAGRAM
P1.0-7
P3.0-2
P3.4-5
P0.0-7
P2.0-3
RD
WR
ALE
INT1
P0.0-7
P2.0-3
RD
WR
ALE
INT1
XFR
AUXRAM &
DDCRAM
8051
CORE
RST
X1
X2
AD0-3
ADC
H/VSYNC
CONTROL
HSYNC
VSYNC
HBLANK
VBLANK
ISCL
ISDA
HSCL
HSDA
PWM DAC
P6.0-7
P5.0-6
P4.0-2
AUX
I/O
DA0-13
DDC & IIC
INTERFACE
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without
notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
Revision 0.95
-1-
2001/07/03